| Commit message (Collapse) | Author | Age | Files | Lines |
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2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* archures.c (bfd_mach_mips_octeon2): New macro
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsocteon2): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeon2.
* elfxx-mips.c (_bfd_elf_mips_mach): Support E_MIPS_MACH_OCTEON2.
(mips_set_isa_flags): Add bfd_mach_mips_octeon2.
(mips_mach_extensions): Add bfd_mach_mips_octeon2.
gas:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
(mips_cpu_info_table): Add Octeon2.
* doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
gas/testsuite:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* gas/mips/mips.exp: Add Octeon2 for an architecture.
Run octeon2 test.
* gas/mips/octeon2.d: New file.
* gas/mips/octeon2.s: New file.
include/opcode:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2.
(INSN_OCTEON2): New macro.
(CPU_OCTEON2): New macro.
(OPCODE_IS_MEMBER): Add Octeon2.
opcodes:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add Octeon2.
For "octeon+", just include OcteonP for the insn.
* mips-opc.c (IOCT): Include Octeon2.
(IOCTP): Include Octeon2.
(IOCT2): New macro.
(mips_builtin_opcodes): Add "laa", "laad", "lac", "lacd", "lad",
"ladd", "lai", "laid", "las", "lasd", "law", "lawd".
Move "lbux", "ldx", "lhx", "lwx", and "lwux" up to where the standard
loads are, and add IOCT2 to them.
Add "lbx" and "lhux".
Add "qmac.00", "qmac.01", "qmac.02", "qmac.03", "qmacs.00",
"qmacs.01", "qmacs.01", "qmacs.02" and "qmacs.03".
Add "zcb" and "zcbt".
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* gas/config/tc-arm.c (do_t_ldstd): Warn for unpredictable cases.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.d: New testcase.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.l: Likewise.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.s: Likewise.
* gas/testsuite/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l: Update
testcase.
* gas/testsuite/gas/testsuite/gas/arm/sp-pc-validations-bad-t.s: Likewise.
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(arm_it): Use ARM_IT_MAX_OPERANDS.
(neon_select_shape): Ensure we have matched all operands.
* gas/testsuite/gas/arm/neon-suffix-bad.l: Add testcase.
* gas/testsuite/gas/arm/neon-suffix-bad.s: Likewise.
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correctly.
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Tag_ARM_ISA_use and Tag_Thumb_ISA_use.
* gas/arm/attr-any-armv4t.d: New test.
* gas/arm/attr-any-armv4t.s: New file.
* gas/arm/attr-any-thumbv6.d: New test.
* gas/arm/attr-any-thumbv6.s: New file.
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(arm_arch_option_table): Likewise.
(arm_option_extension_value_table): Likewise.
(ARM_CPU_OPT): New define.
(ARM_ARCH_OPT): Likewise.
(ARM_EXT_OPT): Likewise.
(arm_cpus): Use ARM_CPU_OPT to initialize.
(arm_archs): Use ARM_ARCH_OPT to initialize.
(arm_extensions): Use ARM_EXT_OPT to initialize.
(arm_parse_extension): Ensure option string matching matches
the whole string.
(arm_parse_cpu): Likewise.
(arm_parse_arch): Likewise.
* gas/testsuite/gas/arm/cmdline-bad-arch.d: New test case.
* gas/testsuite/gas/arm/cmdline-bad-cpu.d: Likewise.
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* gas/mips/mips.exp (run_dump_test_arch): Add an opts parameter.
(run_dump_test_arches): Allow additional options to be passed.
(run_list_test_arch): Add opts to the name.
(run_list_test_arches): Allow the options to be elided.
(mips4-fp, mips5-fp): Run twice, one with -32 and once with -mabi=o64.
(mips64r2-ill, octeon-ill): Remove empty options string.
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2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips-dis.c (mips_arch_choices): Add Octeon+.
* mips-opc.c (IOCT): Include Octeon+.
(IOCTP): New macro.
(mips_builtin_opcodes): Add "saa" and "saad".
bfd/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* archures.c (bfd_mach_mips_octeonp): New macro.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c (I_mipsocteonp): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeonp.
* elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp.
(mips_mach_extensions): Add bfd_mach_mips_octeonp.
include/opcodes/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
(INSN_OCTEONP): New macro.
(CPU_OCTEONP): New macro.
(OPCODE_IS_MEMBER): Add Octeon+.
(M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
gas/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* config/tc-mips.c (CPU_IS_OCTEON): New macro function.
(CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
(NO_ISA_COP): Likewise.
(macro) <ld_st>: Add support when off0 is true.
Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
(mips_cpu_info_table): Add octeon+.
* doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
gas/testsuite/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* gas/mips/mips.exp: Add octeon+ for an architecture.
Run octeon-saa-saad test.
(run_dump_test_arch): For Octeon architectures, also try octeon@.
* gas/mips/octeon-pref.d: Remove -march=octeon from command line.
* gas/mips/octeon.d: Likewise.
* gas/mips/octeon-saa-saad.d: New file.
* gas/mips/octeon-saa-saad.s: New file
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is specified.
* gas/testsuite/gas/arm/mov-highregs-any.d: New testcase.
* gas/testsuite/gas/arm/mov-highregs-any.s: Likewise.
* gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise.
* gas/testsuite/gas/arm/mov-lowregs-any.s: Likewise.
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* config/tc-alpha.c (s_alpha_prologue): Requires empty line.
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* config/tc-alpha.c (s_alpha_frame): Emit a warning if bad value
of RA.
(s_alpha_pdesc): Adjust comment.
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* config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV
with two low register at arch v4t or v5t when assember using
unified syntax.
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* config/rl78-parse.y (rl78_error): Likewise.
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* gas/mips/micromips@24k-triple-stores-1.d: New test.
* gas/mips/micromips@24k-triple-stores-2.d: New test.
* gas/mips/micromips@24k-triple-stores-3.d: New test.
* gas/mips/micromips@24k-triple-stores-4.d: New test.
* gas/mips/micromips@24k-triple-stores-5.d: New test.
* gas/mips/micromips@24k-triple-stores-6.d: New test.
* gas/mips/micromips@24k-triple-stores-7.d: New test.
* gas/mips/micromips@24k-triple-stores-8.d: New test.
* gas/mips/micromips@24k-triple-stores-9.d: New test.
* gas/mips/micromips@24k-triple-stores-10.d: New test.
* gas/mips/micromips@24k-triple-stores-11.d: New test.
* gas/mips/24k-triple-stores-1.s: Adjust for microMIPS
disassembly.
* gas/mips/24k-triple-stores-2.s: Likewise.
* gas/mips/24k-triple-stores-3.s: Likewise.
* gas/mips/24k-triple-stores-4.s: Likewise.
* gas/mips/24k-triple-stores-5.s: Likewise.
* gas/mips/24k-triple-stores-6.s: Likewise.
* gas/mips/24k-triple-stores-7.s: Likewise.
* gas/mips/24k-triple-stores-8.s: Likewise.
* gas/mips/24k-triple-stores-9.s: Likewise.
* gas/mips/24k-triple-stores-10.s: Likewise.
* gas/mips/24k-triple-stores-11.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
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* config/tc-mips.c (macro): Fix unsupported opcode message
capitalization.
(mips_ip, mips16_ip): Likewise.
gas/testsuite/
* gas/mips/mips-double-float-flag.l: Adjust according to
unsupported opcode message capitalization fix.
* gas/mips/mips-hard-float-flag.l: Likewise.
* gas/mips/mips-macro-ill-nofp.l: Likewise.
* gas/mips/mips-macro-ill-sfp.l: Likewise.
* gas/mips/mips1-fp.l: Likewise.
* gas/mips/mips16e-64.l: Likewise.
* gas/mips/mips32-sf32.l: Likewise.
* gas/mips/mips32r2-fp32.l: Likewise.
* gas/mips/mips4-branch-likely.l: Likewise.
* gas/mips/mips4-fp.l: Likewise.
* gas/mips/octeon-ill.l: Likewise.
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mode.
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conditional.
(mips_ip): Likewise.
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"m14kec".
* doc/c-mips.texi (MIPS architecture options): Add "m14ke" and
"m14kec" to the list of -march options.
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that have an in-place addend narrower than the addresses used.
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* config/tc-mips.c (can_swap_branch_p): Exclude microMIPS
variant frags too.
gas/testsuite/
* gas/mips/relax-swap3.d: New test.
* gas/mips/mips16@relax-swap3.d: Likewise.
* gas/mips/micromips@relax-swap3.d: Likewise.
* gas/mips/relax-swap3.s: New test source.
* gas/mips/mips.exp: Run the new tests.
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* gas/doc/c-arm.texi (ARM Options): Add cortex-a7 to list of accepted
CPUs.
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* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Delete unused
variable.
[gas]
* config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
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with the (PLT) instruction suffix when operating in eabi mode.
* doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
suffix.
* gas/arm/pic.d: Update expected output.
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* configure.ac (rl78-*-*) New case.
* configure: Regenerate.
[bfd]
* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
(ALL_MACHINES_CFILES): Add cpu-rl78.c.
(BFD32_BACKENDS): Add elf32-rl78.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
(Makefile.in): Regenerate.
* archures.c (bfd_architecture): Define bfd_arch_rl78.
(bfd_archures_list): Add bfd_rl78_arch.
* config.bfd: Add rl78-*-elf.
* configure.in: Add bfd_elf32_rl78_vec.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rl78.c: New file.
* elf32-rl78.c: New file.
[binutils]
* readelf.c: Include elf/rl78.h
(guess_is_rela): Handle EM_RL78.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
* NEWS: Mention addition of RL78 support.
* MAINTAINERS: Add myself as RL78 port maintainer.
[gas]
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
(TARGET_CPU_HFILES): Add rc-rl78.h.
(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
* Makefile.in: Regenerate.
* configure.in: Add rl78 case.
* configure: Regenerate.
* configure.tgt: Add rl78 case.
* config/rl78-defs.h: New file.
* config/rl78-parse.y: New file.
* config/tc-rl78.c: New file.
* config/tc-rl78.h: New file.
* NEWS: Add Renesas RL78.
* doc/Makefile.am (c-rl78.texi): New.
* doc/Makefile.in: Likewise.
* doc/all.texi: Enable it.
* doc/as.texi: Add it.
[include]
* dis-asm.h (print_insn_rl78): Declare.
[include/elf]
* common.h (EM_RL78, EM_78K0R): New.
* rl78.h: New.
[include/opcode]
* rl78.h: New file.
[ld]
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
(+eelf32rl78.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Add rl78-*-* case.
* emulparams/elf32rl78.sh: New file.
* NEWS: Mention addition of Renesas RL78 support.
[opcodes]
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
rl78-dis.c.
(MAINTAINERCLEANFILES): Add rl78-decode.c.
(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
* Makefile.in: Regenerate.
* configure.in: Add bfd_rl78_arch case.
* configure: Regenerate.
* disassemble.c: Define ARCH_rl78.
(disassembler): Add ARCH_rl78 case.
* rl78-decode.c: New file.
* rl78-decode.opc: New file.
* rl78-dis.c: New file.
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aliases.
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capitalization in gas/NEWs and ld/NEWS.
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* configure.in (ALL_LINGUAS): Add ja.
* configure: Regenerate.
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* cpu-epiphany.c: Reinstate full list of Copyright years.
* elf32-epiphany.c: Likewise.
cpu:
* epiphany.cpu, epiphany.opc: Likewise.
gas:
* config/tc-epiphany.c, config/tc-epiphany.h: Likewise.
* doc/c-epiphany.texi: Likewise.
include:
* elf/epiphany.h: Likewise.
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* doc/as.texinfo [EPIPHANY]: Include c-epiphany.texi to avoid
duplication.
opcodes:
* disassemble.c (ARCH_epiphany): Move into alphasorted spot.
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rx-parse.c: In function ‘rx_parse’:
rx-parse.c:3774:9: error: passing argument 1 of ‘rx_error’ discards ‘const’
qualifier from pointer target type [-Werror]
../../../gas/config/rx-defs.h:40:12: note:
expected ‘char *’ but argument is of type ‘const char *’
cc1: all warnings being treated as errors
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
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* m68k-opc.c (m68k_opcodes): Fix entries for ColdFire moveml.
gas/testsuite/
* gas/m68k/all.exp (movem-offset): Add test.
* gas/m68k/movem-offset.s: New test.
* gas/m68k/movem-offset.d: New.
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(start_noreorder): Likewise.
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(mips_elf_final_processing): Likewise.
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* config/tc-alpha.c (load_expression): Use symbol_mark_used accessor.
(s_alpha_comm): Use symbol_set_frag accessor.
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* s390-opc.txt: Add CPUMF instructions.
2011-10-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-z10.d: Add CPUMF instructions.
* gas/s390/zarch-z10.s: Likewise.
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(md_convert_frag): Likewise.
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Julian Brown <julian@codesourcery.com>
gas/
* config/tc-arm.c (parse_shifter_operand): Fix handling
of explicit rotation.
(encode_arm_shifter_operand): Likewise.
gas/testsuite/
* gas/arm/adrl.d: Adjust.
* gas/arm/immed2.d: New test.
* gas/arm/immed2.s: New test.
ld/testsuite/
* ld-arm/cortex-a8-fix-b-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bl-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Adjust.
* ld-arm/cortex-a8-fix-blx-plt.d: Adjust.
* ld-arm/ifunc-1.dd: Adjust.
* ld-arm/ifunc-2.dd: Adjust.
* ld-arm/ifunc-3.dd: Adjust.
* ld-arm/ifunc-4.dd: Adjust.
* ld-arm/ifunc-5.dd: Adjust.
* ld-arm/ifunc-6.dd: Adjust.
* ld-arm/ifunc-7.dd: Adjust.
* ld-arm/ifunc-8.dd: Adjust.
* ld-arm/ifunc-9.dd: Adjust.
* ld-arm/ifunc-10.dd: Adjust.
* ld-arm/ifunc-14.dd: Adjust.
* ld-arm/ifunc-15.dd: Adjust.
* ld-arm/ifunc-16.dd: Adjust.
opcodes/
* arm-dis.c (print_insn_arm): Explicitly specify rotation
if needed.
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(do_ldst): Warn in upredictable cases.
(do_t_ldst): Likewise.
(insns): Update accordingly.
* gas/arm/ldr-bad.s: New testcase.
* gas/arm/ldr-bad.l: Likewise.
* gas/arm/ldr-bad.d: Likewise.
* gas/arm/ldr.s: Likewise.
* gas/arm/ldr.d: Likewise.
* gas/arm/ldr-t-bad.s: Likewise.
* gas/arm/ldr-t-bad.l: Likewise.
* gas/arm/ldr-t-bad.d: Likewise.
* gas/arm/ldr-t.s: Likewise.
* gas/arm/ldr-t.d: Likewise.
* gas/arm/sp-pc-usage-t.s: Correct.
* gas/arm/sp-pc-usage-t.d: Update accordingly.
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* frags.h (bss_address_frag): Delete
(predefined_address_frag): New.
* frags.c (frag_init): Init predefined_address_frag. Delete ref
to bss_addres_frag.
* symbols.c (S_CAN_BE_REDEFINED): New function.
* symbols.h (S_CAN_BE_REDEFINED): Declare.
* read.c (assign_symbol): Use S_CAN_BE_REDEFINED.
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* symbols.h (local_symbol_make): Declare.
* as.c (main): Define __GAS_VERSION__.
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