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* x86: correct "-Q" option handlingJan Beulich2019-07-042-1/+9
* gas/ELF: don't accumulate .type settingsJan Beulich2019-07-048-1/+118
* Fix assembler tests to work with toolchains that have been configured with --...Nick Clifton2019-07-0393-64/+194
* This patch fixes a bug in the AArch64 assembler where an incorrect structural...Barnaby Wilks2019-07-026-1/+29
* [AArch64] Allow MOVPRFX to be used with FMOVRichard Sandiford2019-07-023-0/+30
* [AArch64] Add missing C_MAX_ELEM flags for SVE conversionsRichard Sandiford2019-07-024-7/+80
* [AArch64] Fix bogus MOVPRFX warning for GPR form of CPYRichard Sandiford2019-07-024-3/+9
* Fix bug when generating REL type relocs for assembler generated build notes.Nick Clifton2019-07-012-10/+21
* [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson2019-07-017-11/+43
* Document the .value directive supported by the x86 and x86_64 assemblers.Nick Clifton2019-07-012-0/+12
* Correct a typo in the description of the Align and P2align directives.Nick Clifton2019-07-012-2/+9
* Fix spelling error in assembler documentation.Nick Clifton2019-07-012-1/+6
* x86: drop Vec_Imm4Jan Beulich2019-07-012-25/+19
* x86: limit ImmExt abuseJan Beulich2019-07-012-13/+17
* x86: optimize AND/OR with twice the same registerJan Beulich2019-07-0110-1/+435
* x86-64: optimize certain commutative VEX-encoded insnsJan Beulich2019-07-0114-1246/+1048
* x86: StaticRounding implies SAEJan Beulich2019-07-012-6/+8
* x86: optimize EVEX packed integer logical instructionsJan Beulich2019-07-0124-17/+955
* x86: add missing pseudo ops for VPCLMULQDQ ISA extensionJan Beulich2019-07-0119-18/+145
* x86: use encoding_length() also elsewhereJan Beulich2019-07-012-32/+8
* x86: warn about insns exceeding the 15-byte limitJan Beulich2019-07-017-0/+146
* i386: Check vector length for scatter/gather prefetch instructionsH.J. Lu2019-06-271-0/+9
* This fixes a bug in the ARm assembler where an immediate operand larger than ...Barnaby Wilk s2019-06-279-10/+54
* x86: add missing testJan Beulich2019-06-272-0/+174
* x86: allow VEX et al encodings in 16-bit (protected) modeJan Beulich2019-06-2715-4/+16793
* Fix a few non-dash safe xstormy16 shell scripts.Jim Wilson2019-06-263-2/+8
* i386: Document memory size reference in assemblerLili Cui2019-06-262-5/+16
* MIPS/gas: Fix order of instructions in LI macro expansionFaraz Shahbazker2019-06-257-37/+140
* x86: correct / adjust debug printingJan Beulich2019-06-252-9/+19
* x86: document certain command line options as "dangerous"Jan Beulich2019-06-252-0/+11
* x86: don't open code is_any_vex_encoding()Jan Beulich2019-06-252-3/+5
* x86: fix (dis)assembly of certain SSE2 insns in 16-bit modeJan Beulich2019-06-254-0/+181
* x86-64: also optimize ANDQ with immediate fitting in 7 bitsJan Beulich2019-06-254-1/+25
* x86: add CVT{,T}PS2PI cases to xmmwords testJan Beulich2019-06-253-0/+12
* Fix logical expression in last commitAlan Modra2019-06-252-1/+5
* PowerPC nopsAlan Modra2019-06-256-19/+106
* i386: Check vector length for EVEX broadcast instructionsH.J. Lu2019-06-195-4/+20
* i386: Check vector length for vshufXXX/vinsertXXX/vextractXXXH.J. Lu2019-06-175-2/+19
* Regenerate with approved autotools versionAlan Modra2019-06-144-22/+14
* Add missing ChangeLog entriesPeter Bergner2019-06-121-0/+5
* Remove the ldmx mnemonic that never made it into POWER9.Peter Bergner2019-06-122-4/+0
* gas: Add .enqcmd and noenqcmd directivesH.J. Lu2019-06-063-0/+10
* gas: Correct ChangeLog for commit 5d79adc4b22b0abdH.J. Lu2019-06-061-12/+14
* i386: Check vector length for EVEX vextractfXX and vinsertfXXH.J. Lu2019-06-055-2/+21
* i386: Check for reserved VEX.vvvv and EVEX.vvvvH.J. Lu2019-06-045-0/+22
* Enable Intel AVX512_VP2INTERSECT insnH.J. Lu2019-06-0418-1/+425
* Add support for Intel ENQCMD[S] instructionsH.J. Lu2019-06-0413-1/+183
* RISC-V: Fix lui argument parsing.Jim Wilson2019-05-304-5/+16
* x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVLH.J. Lu2019-05-285-0/+27
* Fix failure on powerpc 32-bit only targetsAlan Modra2019-05-273-51/+140
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