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* aarch64: Fix DSB instruction 'missing immediate expression' errorsPrzemyslaw Wirkus2020-10-292-0/+29
* aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus2020-10-285-0/+23
* aarch64: Add WFET instruction for Armv8.7-aPrzemyslaw Wirkus2020-10-282-0/+73
* aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus2020-10-285-0/+58
* gas: Clear all auto-assigned file slotsH.J. Lu2020-10-263-0/+65
* CSKY: Change plsl.u16 to plsl.16.Cooper Qu2020-10-262-2/+2
* CSKY: Fix and add some instructions for VDSPV1.Cooper Qu2020-10-261-27/+27
* Change avxvnni disassembler output from {vex3} to {vex}Cui,Lili2020-10-262-32/+32
* [PATCH][GAS][AArch64] Define BRBE system registersPrzemyslaw Wirkus2020-10-225-0/+422
* aarch64: Define CSRE system registersPrzemyslaw Wirkus2020-10-225-0/+68
* arm: Fix the wrong error message string for mve vldr/vstr (PR26763).Srinath Parvathaneni2020-10-223-0/+846
* aarch64: Add testcase for HCR_EL2 system registerPrzemyslaw Wirkus2020-10-212-0/+11
* Add AMD znver3 processor supportGanesh Gopalasubramanian2020-10-2015-0/+232
* gas: Add a -gdwarf-5 debug_line test with .s fileH.J. Lu2020-10-173-0/+54
* gas: Replace dwarf5-line-2.S with dwarf5-line-3.SH.J. Lu2020-10-172-4/+4
* gas: Always use as_where for preprocessed assembly codesH.J. Lu2020-10-175-0/+115
* gas: Reuse the input file entry in the file tableH.J. Lu2020-10-163-0/+57
* Enhancement for avx-vnni patchCui,Lili2020-10-169-20/+20
* x86: Support Intel AVX VNNIH.J. Lu2020-10-145-0/+137
* x86: Add support for Intel HRESET instructionLili Cui2020-10-144-0/+31
* x86: Support Intel UINTRLili Cui2020-10-143-0/+28
* x86: Support GNU_PROPERTY_X86_ISA_1_V[234] markerH.J. Lu2020-10-0932-62/+113
* aarch64: Fix bogus type punning in parse_barrier() [PR26699]Alex Coplan2020-10-062-0/+2
* Fix gas sh-link-zero test for hppa64-hpuxAlan Modra2020-10-061-7/+6
* i386: Allow non-absolute segment values for lcall/ljmpT.K. Chia2020-10-055-2/+44
* x86-64: Always display suffix for %LQ in 64bitH.J. Lu2020-10-054-4/+4
* x86: Clear modrm if not neededH.J. Lu2020-10-053-0/+6
* GAS: Update the .section directive so that a numeric section index can be pro...Nick Clifton2020-10-054-2/+26
* x86: Update register operand check for AddrPrefixOpRegH.J. Lu2020-10-0317-55/+158
* arm: add support for Cortex-A78 and Cortex-A78AEPrzemyslaw Wirkus2020-10-022-0/+12
* Fix the mve-vcvtne-it assembler test for the arm-*-pe targets.Nick Clifton2020-10-021-1/+2
* Add new directive to GAS: .attach_to_group.Nick Clifton2020-10-018-0/+58
* x86: Check register operand for AddrPrefixOpRegH.J. Lu2020-09-306-34/+88
* This patch adds support for Cortex-X1 for ARM.Przemyslaw Wirkus2020-09-281-0/+6
* This patch introduces ETMv4 (Embedded Trace Macrocell) system registers for t...Przemyslaw Wirkus2020-09-2813-2/+912
* This patch introduces ETE (Embedded Trace Extension) system registers for the...Przemyslaw Wirkus2020-09-282-0/+33
* This patch introduces TRBE (Trace Buffer Extension) system registers for the ...Przemyslaw Wirkus2020-09-285-0/+44
* RISC-V: Error for relaxable branch in absolute section.Jim Wilson2020-09-243-0/+7
* readelf: Show Unit Type for DWARF5Mark Wielaard2020-09-241-0/+1
* Add support for Intel TDX instructions.Cui,Lili2020-09-245-0/+42
* CSKY: Add objdump option -M abi-names.Cooper Qu2020-09-235-37/+35
* Enable support to Intel Keylocker instructionsTerry Guo2020-09-2310-0/+229
* bpf: xBPF SDIV, SMOD instructionsDavid Faust2020-09-185-0/+59
* Tidy gas i386.expAlan Modra2020-09-171-34/+34
* PE/x86-64: Display PE relocation namesH.J. Lu2020-09-152-5/+5
* Add a new ".nop" directive to the assembler to allow the creation of no-op in...Nick Clifton2020-09-147-5/+34
* gas: Don't error when .debug_line already exists, unless .loc was usedMark Wielaard2020-09-1110-0/+329
* CSKY: Add L2Cache instructions for CK860.Cooper Qu2020-09-101-1/+1
* aarch64: Add support for Armv8-R system registersAlex Coplan2020-09-087-0/+474
* aarch64: Add support for Armv8-R DFB aliasAlex Coplan2020-09-082-0/+10
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