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* gas: improve architecture mismatch diagnostics in sparcJose E. Marchesi2016-09-141-1/+1
* gas: detect DCTI couples in sparcJose E. Marchesi2016-09-141-11/+45
* [ARC] Fix parsing dtpoff relocation expression.Claudiu Zissulescu2016-09-141-1/+1
* S/390: Add alternate processor names.Andreas Krebbel2016-09-121-13/+31
* S/390: Fix facility bit default.Andreas Krebbel2016-09-121-1/+4
* Allow PROCESSOR_IAMCU for Intel MCUH.J. Lu2016-09-081-1/+1
* X86: Allow additional ISAs for IAMCU in assemblerH.J. Lu2016-09-071-21/+2
* [arm] Automatically enable CRC instructions on supported ARMv8-A CPUs.Richard Earnshaw2016-09-071-9/+9
* PowerPC VLE sh_flags and p_flagsAlan Modra2016-08-311-5/+9
* Add missing ARMv8-M special registersThomas Preud'homme2016-08-261-18/+27
* Remove _S version of ARM MSR/MRS special registersThomas Preud'homme2016-08-251-2/+2
* X86: Add ptwrite instructionH.J. Lu2016-08-241-0/+2
* ARM: Issue a warning when the MRRC and MRRC2 instructions are used with the s...Tamar Christina2016-08-191-0/+8
* [AArch64] Reject -0.0 as an 8-bit FP immediateRichard Sandiford2016-08-111-1/+1
* Ensure ARM VPUSH and VPOP instructions do not affect more than 16 registers.Nick Clifton2016-08-052-37/+53
* Fix the generation of alignment frags in code sections for AArch64.Nick Clifton2016-08-051-3/+7
* Fix generation of relocs for 32-bit Sparc Solaris targets.Stefan Trleman2016-08-041-0/+16
* MIPS/GAS: Implement microMIPS branch/jump compactionMaciej W. Rozycki2016-07-271-51/+203
* Begin implementing ARC NPS-400 Accelerator instructionsGraham Markall2016-07-271-35/+117
* MIPS/GAS: Respect the `insn32' mode in branch relaxationMaciej W. Rozycki2016-07-261-45/+85
* MIPS/GAS: Remove erroneous ELF relocation referencesMaciej W. Rozycki2016-07-201-7/+5
* MIPS: Convert cross-mode BAL to JALXMaciej W. Rozycki2016-07-191-4/+14
* MIPS: Verify the ISA mode and alignment of branch and jump targetsMaciej W. Rozycki2016-07-191-16/+264
* make the type of nds32_pseudo_opcode::pseudo_val unsignedTrevor Saunders2016-07-191-32/+62
* sparc: make a field type bfd_reloc_code_real_typeTrevor Saunders2016-07-191-1/+1
* sparc: remove a sentinalTrevor Saunders2016-07-191-16/+11
* tc-z8k.c: make some argument types bfd_reloc_code_real_typeTrevor Saunders2016-07-191-3/+8
* Don't include libbfd.h outside of bfd, part 2Alan Modra2016-07-168-8/+0
* Don't include libbfd.h outside of bfd, part 1Alan Modra2016-07-165-8/+3
* MIPS/GAS: Don't convert PC-relative REL relocs against absolute symbolsMaciej W. Rozycki2016-07-142-0/+19
* MIPS/GAS: Keep the ISA bit in the addend of branch relocationsMaciej W. Rozycki2016-07-141-9/+1
* TLS: DTPOFF can accept offsets, stored into addendum. Remove the need of baseClaudiu Zissulescu2016-07-111-23/+2
* MIPS/GAS: Remove extraneous `install_insn' call from `append_insn'Maciej W. Rozycki2016-07-081-1/+0
* x86: fix register check in check_qword_reg()Jan Beulich2016-07-051-1/+1
* [AArch64] Fix +nofp16 handlingSzabolcs Nagy2016-07-011-17/+67
* x86-64/MPX: bndmk, bndldx, and bndstx don't allow RIP-relative addressingJan Beulich2016-07-011-0/+17
* x86/MPX: fix address size handlingJan Beulich2016-07-011-4/+9
* x86/Intel: don't accept bogus instructionsJan Beulich2016-07-011-5/+27
* x86/Intel: fix operand checking for MOVSDJan Beulich2016-07-012-1/+57
* MIPS/GAS: Fix a comment typo in `get_append_method'Maciej W. Rozycki2016-06-301-1/+1
* MIPS16/GAS: Fix delay slot filling across fragsMatthew Fortune2016-06-301-7/+2
* MIPS/GAS: Simplify non-MIPS16 branch swapping sequenceMaciej W. Rozycki2016-06-301-3/+4
* Allow ARC target to be configured with --with-cpu=<cpu-name>.Andrew Burgess2016-06-301-2/+7
* Correct fix for typoNick Clifton2016-06-291-1/+1
* Fix typoNick Clifton2016-06-291-1/+1
* MIPS16: Add R_MIPS16_PC16_S1 branch relocation supportMaciej W. Rozycki2016-06-281-7/+47
* Make the kernel dwarf stack unwinder work for ARC targets.Vineet Gupta2016-06-271-1/+1
* dlx: move prototype of dlx_set_skip_hi16 to elf/dlx.hTrevor Saunders2016-06-272-1/+2
* xtensa: remove a sentinalTrevor Saunders2016-06-271-15/+14
* nds32: remove a sentinalTrevor Saunders2016-06-271-14/+5