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* Add vmfuncH.J. Lu2012-01-131-0/+2
* 2012-01-06 Tristan Gingold <gingold@adacore.com>Tristan Gingold2012-01-061-6/+18
* Check R_X86_64_32 overflow and allow R_X86_64_64 for x32.H.J. Lu2011-08-011-49/+10
* Add initial Intel K1OM support.H.J. Lu2011-07-221-0/+29
* 2011-06-29 Tristan Gingold <gingold@adacore.com>Tristan Gingold2011-06-291-27/+13
* Support AVX Programming Reference (June, 2011).H.J. Lu2011-06-101-5/+104
* 2011-05-12 Quentin Neill <quentin.neill@amd.com>Quentin Neill2011-05-121-5/+5
* 2011-05-10 Quentin Neill <quentin.neill@amd.com>Quentin Neill2011-05-101-4/+6
* Start error message with lower case.H.J. Lu2011-04-121-19/+19
* 2011-04-11 Kai Tietz <ktietz@redhat.com>Kai Tietz2011-04-111-1/+1
* * config/tc-i386.c (x86_cons): Define even for non-ELF targets.Nick Clifton2011-04-111-1/+1
* Properly handle multiple operands for x32 quad.H.J. Lu2011-03-291-8/+8
* Support .quad for x32.H.J. Lu2011-03-281-0/+48
* Add support for DragonFlyBSD target.Nick Clifton2011-03-281-0/+1
* Revert the last change.H.J. Lu2011-03-051-10/+3
* Set x86_cie_data_alignment to -4 for x32.H.J. Lu2011-03-051-3/+10
* Don't sign-checking 4-byte relocations for x32.H.J. Lu2011-02-251-1/+1
* Use f32_patt in i386_align_code when tuning for i686.H.J. Lu2011-02-081-1/+1
* Also update cpu_arch_isa_flags for ISA extensions.H.J. Lu2011-02-081-0/+2
* 2011-01-26 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2011-01-261-0/+5
* Add support for TBM instructions.Quentin Neill2011-01-171-0/+2
* Disallow 64bit relocations in x32 mode.H.J. Lu2011-01-161-17/+27
* Don't allow movabs with relocation in x32 mode.H.J. Lu2011-01-151-11/+24
* Rename --n32 to --x32.H.J. Lu2011-01-141-4/+4
* * config/tc-i386.c (x86_elf_abi): Only define for targets that useNick Clifton2011-01-101-0/+5
* Add docs and arch tests to BMI.Quentin Neill2011-01-071-0/+2
* Implement BMI instructions.H.J. Lu2011-01-051-18/+57
* Add x86-64 ILP32 support.H.J. Lu2010-12-311-10/+67
* Add CheckRegSize to instructions which require register size check.H.J. Lu2010-10-141-3/+2
* Add .d32 encoding suffix.H.J. Lu2010-10-141-7/+17
* PR gas/12011Alan Modra2010-09-161-2/+2
* Check VEXW1 for 2-byte VEX prefix.H.J. Lu2010-09-091-0/+1
* Check flag_code instead of use_rela_relocations for 64bit.H.J. Lu2010-09-031-2/+2
* Fix a typo in comments.H.J. Lu2010-08-191-1/+1
* Check i.imm_operands VEXXDS.H.J. Lu2010-08-181-3/+3
* Re-indent config/tc-i386.c.H.J. Lu2010-08-061-3/+3
* Don't generate multi-byte NOPs for i686.H.J. Lu2010-08-061-82/+85
* Move the first i.error out of the loop.H.J. Lu2010-08-041-2/+3
* Don't call section_symbol() with expr_section.H.J. Lu2010-07-031-1/+2
* Support AVX Programming Reference (June, 2010)H.J. Lu2010-07-011-0/+8
* gas/Jan Beulich2010-06-111-4/+12
* Stop if -march=XXX is invalid.H.J. Lu2010-06-101-5/+24
* gas/Jan Beulich2010-06-101-45/+10
* 2010-06-08 Quentin Neill <quentin.neill@amd.com>Sebastian Pop2010-06-081-25/+25
* 2010-06-02 Quentin Neill <quentin.neill@amd.com>Sebastian Pop2010-06-031-1/+1
* Remove i386_is_register.H.J. Lu2010-04-221-10/+2
* Don't use i386_is_register in tc_x86_parse_to_dw2regnum.H.J. Lu2010-04-221-1/+1
* Remove is_intel_syntax from i386_is_register.H.J. Lu2010-04-221-8/+7
* Properly handle ".equ symbol, reg + NUM" in x86 Intel syntax.H.J. Lu2010-04-211-3/+13
* Use STRING_COMMA_LEN to avoid strlen.H.J. Lu2010-03-221-38/+36
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