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* x86-64: fix Intel64 handling of branch with data16 prefixJan Beulich2019-12-271-0/+13
* x86: consolidate Disp<NN> handling a littleJan Beulich2019-12-271-0/+13
* Remove tic80 supportAlan Modra2019-12-171-0/+4
* i386: Also check R12-R15 registers when optimizing testq to testbH.J. Lu2019-12-121-0/+11
* i386: Add tests for -malign-branch-boundary and -malign-branchH.J. Lu2019-12-121-0/+54
* i386: Add -mbranches-within-32B-boundariesH.J. Lu2019-12-121-0/+7
* i386: Align branches within a fixed boundaryH.J. Lu2019-12-121-0/+60
* gas: Add md_generic_table_relax_fragH.J. Lu2019-12-121-0/+7
* gas signed overflow fixesAlan Modra2019-12-121-0/+17
* obj-evax.c tidyAlan Modra2019-12-121-0/+13
* [gas][arm] Add -mwarn-restrict-itAndre Vieira2019-12-111-0/+14
* x86: further refine SSE check (SSE4a, SHA, GFNI)Jan Beulich2019-12-111-0/+10
* [gas][arm] Set context table for '.arch_extension'Andre Vieira2019-12-101-0/+6
* x86/Intel: fold "xmmword" with "oword"Jan Beulich2019-12-091-0/+9
* x86/Intel: support "mmword ptr"Jan Beulich2019-12-091-0/+10
* x86/Intel: fix "near ptr" / "far ptr" handlingJan Beulich2019-12-091-0/+8
* x86/Intel: drop pointless suffix setting for "tbyte ptr"Jan Beulich2019-12-091-0/+6
* x86/Intel: drop pointless suffix setting for "fword ptr"Jan Beulich2019-12-091-0/+5
* x86/Intel: drop pointless special casing of LxSJan Beulich2019-12-091-0/+5
* aarch64*-*-*ilp32 gas testsAlan Modra2019-12-081-0/+16
* [gas] Implement .cfi_negate_ra_state directiveKyrylo Tkachov2019-12-061-0/+6
* Arm64: simplify Crypto arch extension handlingJan Beulich2019-12-051-0/+5
* Arm64: correct "sha3" arch-extension directive handlingJan Beulich2019-12-051-0/+12
* x86-64: accept 64-bit LFS/LGS/LSS forms with suffix or operand size specifierJan Beulich2019-12-041-0/+14
* x86-64/Intel: fix CALL/JMP with dword operandJan Beulich2019-12-041-0/+8
* x86: consolidate tracking of MMX register useJan Beulich2019-12-041-0/+5
* x86/Intel: extend MOVDIRI testingJan Beulich2019-12-041-0/+11
* x86: make sure all PUSH/POP honor DefaultSizeJan Beulich2019-12-041-0/+10
* x86: drop some stray/bogus DefaultSizeJan Beulich2019-12-041-0/+7
* gas/riscv: Produce version 3 DWARF CIE by defaultAndrew Burgess2019-11-281-0/+11
* gas: Check for overflow on return column in version 1 CIE DWARFAndrew Burgess2019-11-281-0/+7
* binutils/gas/riscv: Add DWARF register numbers for CSRsAndrew Burgess2019-11-281-0/+7
* gas/riscv: Remove unneeded structureAndrew Burgess2019-11-281-0/+5
* Fix "psb CSYNC" and "bti C".Andrew Pinski2019-11-251-0/+7
* Introduce new section flag: SEC_ELF_OCTETSChristian Eggers2019-11-251-0/+12
* Reverts patches providing octet support in dwarfChristian Eggers2019-11-251-0/+12
* Arm: Change CRC from fpu feature to archititectural extensionMihail Ionescu2019-11-221-0/+12
* PR24944, gas doesn't read enough digits when parsing a floating point numberAlan Modra2019-11-201-0/+7
* gas: Add --gdwarf-cie-version command line flagAndrew Burgess2019-11-181-0/+17
* x86: fold individual Jump* attributes into a single Jump oneJan Beulich2019-11-141-0/+8
* x86: make JumpAbsolute an insn attributeJan Beulich2019-11-141-0/+10
* x86: make AnySize an insn attributeJan Beulich2019-11-141-0/+4
* x86/Intel: correct CMPSD test cases' regexp closing paren placementJan Beulich2019-11-141-0/+6
* x86/Intel: extend MOVSD/CMPSD testsuite coverageJan Beulich2019-11-141-0/+12
* RISC-V: Support the INSN_CLASS.*F.* classes for .insn directive.Jim Wilson2019-11-121-0/+4
* [gas][arm] Enable VLDM, VSTM, VPUSH, VPOP for MVEMihail Ionescu2019-11-121-0/+15
* [binutils][arm] Update the decoding of MVE VMOV, VMVNMihail Ionescu2019-11-121-0/+6
* [gas][arm] Make .fpu reset the FPU/Coprocessor feature bitsMihail Ionescu2019-11-121-0/+8
* x86: fold EsSeg into IsStringJan Beulich2019-11-121-0/+8
* x86: eliminate ImmExt abuseJan Beulich2019-11-121-0/+16
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