delta/binutils-gdb.git - sourceware.org: git/binutils-gdb.git

	Commit message (Expand)	Author	Age	Files	Lines
*	x86: rework noavx512-1 testcase	Jan Beulich	2022-12-22	3	-587/+415
*	x86: add dependencies on AVX2	Jan Beulich	2022-12-22	3	-11/+33
*	x86: correct SSE dependencies	Jan Beulich	2022-12-22	3	-52/+96
*	x86: correct what gets disabled by certain ".arch .no*"	Jan Beulich	2022-12-22	1	-18/+18
*	x86: re-work ISA extension dependency handling	Jan Beulich	2022-12-22	3	-1024/+910
*	sim: mips: match target on cpu settings	Mike Frysinger	2022-12-21	2	-26/+26
*	sim: mips: move fpu bitsize defines to top-level configure	Mike Frysinger	2022-12-21	8	-71/+44
*	sim: mips: move bitsize defines to top-level configure	Mike Frysinger	2022-12-21	8	-99/+48
*	sim: mips: move subtarget defines to top-level configure	Mike Frysinger	2022-12-21	8	-43/+68
*	sim: mips: always resolve active bfd mach dynamically	Mike Frysinger	2022-12-21	3	-106/+3
*	sim: hw-config.h: move generation to top-level	Mike Frysinger	2022-12-21	3	-30/+54
*	sim: build: hoist lists of hw devices up	Mike Frysinger	2022-12-21	16	-127/+190
*	sim: build: hoist lists of common objects up	Mike Frysinger	2022-12-21	4	-131/+167
*	Automatic date update in version.in	GDB Administrator	2022-12-22	1	-1/+1
*	PR29925, Memory leak in find_abstract_instance	Alan Modra	2022-12-22	1	-12/+19
*	Fix compiling of top.c	Andrew Pinski	2022-12-21	1	-1/+0
*	Use toplevel configure for GMP and MPFR for gdb	Andrew Pinski	2022-12-21	12	-1094/+142
*	gdb/c++: validate 'using' directives based on the current line	Bruno Larsen	2022-12-21	6	-9/+95
*	Updated Romanian translation for the BFD sub-directory.	Nick Clifton	2022-12-21	2	-1970/+2073
*	Fix an attempt to allocate an unreasonably large amount of memory when parsin...	Nick Clifton	2022-12-21	2	-1/+9
*	Keep the .drectve section when performing a relocateable link.	Nick Clifton	2022-12-21	3	-2/+9
*	x86: rename CheckRegSize to CheckOperandSize	Jan Beulich	2022-12-21	4	-513/+513
*	gprofng/testsuite: restrict testing to native configurations	Jan Beulich	2022-12-21	1	-0/+7
*	enable-non-contiguous-regions warnings	Alan Modra	2022-12-21	18	-66/+59
*	PR29922, SHT_NOBITS section avoids section size sanity check	Alan Modra	2022-12-21	1	-3/+9
*	sim: fully merge sim_cpu_base into sim_cpu	Mike Frysinger	2022-12-21	1	-26/+19
*	sim: enable common sim_cpu usage everywhere	Mike Frysinger	2022-12-21	29	-66/+1
*	sim: or1k: invert sim_cpu storage	Mike Frysinger	2022-12-21	5	-30/+43
*	sim: m32r: invert sim_cpu storage	Mike Frysinger	2022-12-21	5	-14/+10
*	sim: lm32: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-12/+7
*	sim: iq2000: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-11/+7
*	sim: frv: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-23/+18
*	sim: cris: invert sim_cpu storage	Mike Frysinger	2022-12-21	6	-239/+244
*	sim: bpf: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-7/+13
*	sim: cgen: prep for inverting sim_cpu storage	Mike Frysinger	2022-12-21	2	-0/+15
*	sim: riscv: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-191/+258
*	sim: pru: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-8/+31
*	sim: example-synacor: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-37/+47
*	sim: h8300: invert sim_cpu storage	Mike Frysinger	2022-12-21	2	-34/+36
*	sim: m68hc11: invert sim_cpu storage	Mike Frysinger	2022-12-21	10	-354/+446
*	sim: mips: invert sim_cpu storage	Mike Frysinger	2022-12-21	2	-73/+90
*	sim: v850: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-20/+23
*	sim: mcore: invert sim_cpu storage	Mike Frysinger	2022-12-21	2	-27/+41
*	sim: aarch64: invert sim_cpu storage	Mike Frysinger	2022-12-21	5	-108/+152
*	sim: microblaze: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-8/+8
*	sim: avr: invert sim_cpu storage	Mike Frysinger	2022-12-21	2	-99/+108
*	sim: moxie: invert sim_cpu storage	Mike Frysinger	2022-12-21	2	-14/+13
*	sim: msp430: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-120/+106
*	sim: ft32: invert sim_cpu storage	Mike Frysinger	2022-12-21	3	-95/+99
*	sim: bfin: invert sim_cpu storage	Mike Frysinger	2022-12-21	2	-10/+5