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-rw-r--r--ld/emultempl/riscvelf.em8
-rw-r--r--ld/testsuite/ld-riscv-elf/align-small-region.d12
-rw-r--r--ld/testsuite/ld-riscv-elf/align-small-region.ld12
-rw-r--r--ld/testsuite/ld-riscv-elf/align-small-region.s7
-rw-r--r--ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp2
-rw-r--r--ld/testsuite/ld-riscv-elf/restart-relax.d14
-rw-r--r--ld/testsuite/ld-riscv-elf/restart-relax.s17
7 files changed, 34 insertions, 38 deletions
diff --git a/ld/emultempl/riscvelf.em b/ld/emultempl/riscvelf.em
index c625a631fe5..80b7b3707d5 100644
--- a/ld/emultempl/riscvelf.em
+++ b/ld/emultempl/riscvelf.em
@@ -42,7 +42,7 @@ riscv_elf_before_allocation (void)
ENABLE_RELAXATION;
}
- link_info.relax_pass = 4;
+ link_info.relax_pass = 3;
}
static void
@@ -76,11 +76,7 @@ gld${EMULATION_NAME}_after_allocation (void)
enum phase_enum *phase = &(expld.dataseg.phase);
bfd_elf${ELFSIZE}_riscv_set_data_segment_info (&link_info, (int *) phase);
- do
- {
- ldelf_map_segments (need_layout);
- }
- while (bfd_elf${ELFSIZE}_riscv_restart_relax_sections (&link_info));
+ ldelf_map_segments (need_layout);
}
/* This is a convenient point to tell BFD about target specific flags.
diff --git a/ld/testsuite/ld-riscv-elf/align-small-region.d b/ld/testsuite/ld-riscv-elf/align-small-region.d
new file mode 100644
index 00000000000..3799129c665
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/align-small-region.d
@@ -0,0 +1,12 @@
+#source: align-small-region.s
+#as: -march=rv32i
+#ld: -melf32lriscv --relax -Talign-small-region.ld --defsym=_start=0x100
+#objdump: -d
+
+.*:[ ]+file format .*
+
+Disassembly of section \.entry:
+
+00000000 <_reset>:
+.*:[ ]+[0-9a-f]+[ ]+j[ ]+100[ ]+<_start>
+#pass
diff --git a/ld/testsuite/ld-riscv-elf/align-small-region.ld b/ld/testsuite/ld-riscv-elf/align-small-region.ld
new file mode 100644
index 00000000000..a5a37835c65
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/align-small-region.ld
@@ -0,0 +1,12 @@
+MEMORY
+{
+ reset : ORIGIN = 0x0, LENGTH = 32
+}
+
+SECTIONS
+{
+ .entry :
+ {
+ KEEP (*(.entry))
+ } > reset
+}
diff --git a/ld/testsuite/ld-riscv-elf/align-small-region.s b/ld/testsuite/ld-riscv-elf/align-small-region.s
new file mode 100644
index 00000000000..1c0f3ccbe55
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/align-small-region.s
@@ -0,0 +1,7 @@
+ .section .entry, "xa"
+ .align 5
+ .globl _reset
+ .type _reset, @function
+_reset:
+ tail _start
+ .size _reset, . - _reset
diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
index 11977611733..20ca3bdb195 100644
--- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
+++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
@@ -119,6 +119,7 @@ proc run_relax_twice_test {} {
}
if [istarget "riscv*-*-*"] {
+ run_dump_test "align-small-region"
run_dump_test "call-relax"
run_dump_test "pcgp-relax"
run_dump_test "c-lui"
@@ -130,7 +131,6 @@ if [istarget "riscv*-*-*"] {
run_dump_test "pcrel-lo-addend-3a"
run_dump_test "pcrel-lo-addend-3b"
run_dump_test "pcrel-lo-addend-3c"
- run_dump_test "restart-relax"
run_dump_test "attr-merge-arch-01"
run_dump_test "attr-merge-arch-02"
run_dump_test "attr-merge-arch-03"
diff --git a/ld/testsuite/ld-riscv-elf/restart-relax.d b/ld/testsuite/ld-riscv-elf/restart-relax.d
deleted file mode 100644
index 57b62eb20ef..00000000000
--- a/ld/testsuite/ld-riscv-elf/restart-relax.d
+++ /dev/null
@@ -1,14 +0,0 @@
-#source: restart-relax.s
-#as:
-#ld:
-#objdump: -d
-
-#...
-Disassembly of section .text:
-
-0+[0-9a-f]+ <_start>:
-.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*
-#...
-.*:[ ]+[0-9a-f]+[ ]+jal[ ]+ra,[0-9a-f]+ <_start>
-.*:[ ]+[0-9a-f]+[ ]+add[ ]+a0,a1,a2
-#pass
diff --git a/ld/testsuite/ld-riscv-elf/restart-relax.s b/ld/testsuite/ld-riscv-elf/restart-relax.s
deleted file mode 100644
index efc881d14e0..00000000000
--- a/ld/testsuite/ld-riscv-elf/restart-relax.s
+++ /dev/null
@@ -1,17 +0,0 @@
- .text
- .global _start
-_start:
- lla a0, data_g
-.rept 0x3fffe
- nop
-.endr
- call _start
- .option rvc
- .align 2
- add a0, a1, a2
-
- .data
- .global data_g
- .dword 0x0
-data_g:
- .word 0x1000