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-rw-r--r--ld/ChangeLog9
-rw-r--r--ld/emultempl/aarch64elf.em11
-rw-r--r--ld/testsuite/ChangeLog6
-rw-r--r--ld/testsuite/ld-aarch64/aarch64-elf.exp1
-rw-r--r--ld/testsuite/ld-aarch64/erratum843419.d69
-rw-r--r--ld/testsuite/ld-aarch64/erratum843419.s84
6 files changed, 179 insertions, 1 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 6082e28bd2a..ac1abaed547 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,12 @@
+2015-04-01 Tejas Belagod <tejas.belagod@arm.com>
+
+ * emultempl/aarch64elf.em
+ (aarch64_elf_create_output_section_statements): Add parameter in
+ bfd_elf${ELFSIZE}_aarch64_set_options call.
+ (OPTION_FIX_ERRATUM_843419): Define.
+ (PARSE_AND_LIST_LONGOPTS): Add fix-cortex-a53-843419.
+ (PARSE_AND_LIST_ARGS_CASES): Add OPTION_FIX_ERRATUM_843419.
+
2015-04-01 Chen Gang <gang.chen.5i5j@gmail.com>
* emulparams/elf32_tic6x_le.sh: Skip OTHER_BSS_SECTIONS for
diff --git a/ld/emultempl/aarch64elf.em b/ld/emultempl/aarch64elf.em
index 75f04a7ec82..313263a1a2b 100644
--- a/ld/emultempl/aarch64elf.em
+++ b/ld/emultempl/aarch64elf.em
@@ -31,6 +31,7 @@ static int no_enum_size_warning = 0;
static int no_wchar_size_warning = 0;
static int pic_veneer = 0;
static int fix_erratum_835769 = 0;
+static int fix_erratum_843419 = 0;
static void
gld${EMULATION_NAME}_before_parse (void)
@@ -303,7 +304,8 @@ aarch64_elf_create_output_section_statements (void)
bfd_elf${ELFSIZE}_aarch64_set_options (link_info.output_bfd, &link_info,
no_enum_size_warning,
no_wchar_size_warning,
- pic_veneer, fix_erratum_835769);
+ pic_veneer,
+ fix_erratum_835769, fix_erratum_843419);
stub_file = lang_add_input_file ("linker stubs",
lang_input_file_is_fake_enum,
@@ -353,6 +355,7 @@ PARSE_AND_LIST_PROLOGUE='
#define OPTION_STUBGROUP_SIZE 311
#define OPTION_NO_WCHAR_SIZE_WARNING 312
#define OPTION_FIX_ERRATUM_835769 313
+#define OPTION_FIX_ERRATUM_843419 314
'
PARSE_AND_LIST_SHORTOPTS=p
@@ -364,6 +367,7 @@ PARSE_AND_LIST_LONGOPTS='
{ "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
{ "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
{ "fix-cortex-a53-835769", no_argument, NULL, OPTION_FIX_ERRATUM_835769},
+ { "fix-cortex-a53-843419", no_argument, NULL, OPTION_FIX_ERRATUM_843419},
'
PARSE_AND_LIST_OPTIONS='
@@ -382,6 +386,7 @@ PARSE_AND_LIST_OPTIONS='
the linker should choose suitable defaults.\n"
));
fprintf (file, _(" --fix-cortex-a53-835769 Fix erratum 835769\n"));
+ fprintf (file, _(" --fix-cortex-a53-843419 Fix erratum 843419\n"));
'
PARSE_AND_LIST_ARGS_CASES='
@@ -405,6 +410,10 @@ PARSE_AND_LIST_ARGS_CASES='
fix_erratum_835769 = 1;
break;
+ case OPTION_FIX_ERRATUM_843419:
+ fix_erratum_843419 = 1;
+ break;
+
case OPTION_STUBGROUP_SIZE:
{
const char *end;
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index b35ab3f0570..2b8d3453f6a 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-04-01 Tejas Belagod <tejas.belagod@arm.com>
+
+ * ld-aarch64/aarch64-elf.exp: Add erratum843419 test.
+ * ld-aarch64/erratum843419.d: New.
+ * ld-aarch64/erratum843419.s: New.
+
2015-04-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/18176
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index a7ce3f29186..895b1b26bc9 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -46,6 +46,7 @@ set aarch64elftests {
}
run_ld_link_tests $aarch64elftests
+run_dump_test "erratum843419"
# Relocation Tests
run_dump_test "weak-undefined"
diff --git a/ld/testsuite/ld-aarch64/erratum843419.d b/ld/testsuite/ld-aarch64/erratum843419.d
new file mode 100644
index 00000000000..4be8f9e5850
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419.d
@@ -0,0 +1,69 @@
+#source: erratum843419.s
+#as:
+#ld: --fix-cortex-a53-835769 --fix-cortex-a53-843419 -e0 --section-start .e843419=0x20000000 --section-start .e835769=0x3000000 -Ttext=0x400000 -Tdata=0x40000000
+#objdump: -dr
+#...
+
+Disassembly of section .e843419:
+
+0000000020000000 <e843419>:
+ 20000000: d10043ff sub sp, sp, #0x10
+ 20000004: d28001a7 mov x7, #0xd // #13
+ 20000008: b9000fe7 str w7, \[sp,#12\]
+ 2000000c: 140003fb b 20000ff8 <e843419_1>
+ ...
+
+0000000020000ff8 <e843419_1>:
+ 20000ff8: 90100000 adrp x0, 40000000 <[_a-zA-z0-9]+>
+ 20000ffc: f800c007 stur x7, \[x0,#12\]
+ 20001000: d2800128 mov x8, #0x9 // #9
+ 20001004: 14000008 b 20001024 <e843419@0002_00000013_1004>
+ 20001008: 8b050020 add x0, x1, x5
+ 2000100c: b9400fe7 ldr w7, \[sp,#12\]
+ 20001010: 0b0700e0 add w0, w7, w7
+ 20001014: 910043ff add sp, sp, #0x10
+ 20001018: 14000005 b 2000102c <__e835769_veneer>
+ 2000101c: d65f03c0 ret
+ 20001020: 14000400 b 20002020 <__e835769_veneer\+0xff4>
+
+0000000020001024 <e843419@0002_00000013_1004>:
+ 20001024: f9000008 str x8, \[x0\]
+ 20001028: 17fffff8 b 20001008 <e843419_1\+0x10>
+
+000000002000102c <__e835769_veneer>:
+ 2000102c: f0f17ff0 adrp x16, 3000000 <e835769>
+ 20001030: 91000210 add x16, x16, #0x0
+ 20001034: d61f0200 br x16
+ ...
+
+Disassembly of section .e835769:
+
+0000000003000000 <e835769>:
+ 3000000: b8408c87 ldr w7, \[x4,#8\]!
+ 3000004: 1b017c06 mul w6, w0, w1
+ 3000008: f9400084 ldr x4, \[x4\]
+ 300000c: 14000004 b 300001c <__erratum_835769_veneer_0>
+ 3000010: aa0503e0 mov x0, x5
+ 3000014: d65f03c0 ret
+ 3000018: 14000400 b 3001018 <__erratum_835769_veneer_0\+0xffc>
+
+000000000300001c <__erratum_835769_veneer_0>:
+ 300001c: 9b031845 madd x5, x2, x3, x6
+ 3000020: 17fffffc b 3000010 <e835769\+0x10>
+ ...
+
+Disassembly of section .text:
+
+0000000000400000 <main>:
+ 400000: d10043ff sub sp, sp, #0x10
+ 400004: d28001a7 mov x7, #0xd // #13
+ 400008: b9000fe7 str w7, \[sp,#12\]
+ 40000c: 14000003 b 400018 <__e843419_veneer>
+ 400010: d65f03c0 ret
+ 400014: 14000400 b 401014 <__e843419_veneer\+0xffc>
+
+0000000000400018 <__e843419_veneer>:
+ 400018: 900fe010 adrp x16, 20000000 <e843419>
+ 40001c: 91000210 add x16, x16, #0x0
+ 400020: d61f0200 br x16
+ ...
diff --git a/ld/testsuite/ld-aarch64/erratum843419.s b/ld/testsuite/ld-aarch64/erratum843419.s
new file mode 100644
index 00000000000..35c21ae95a6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419.s
@@ -0,0 +1,84 @@
+
+ .comm data0,4,4
+ .text
+ .align 2
+ .global main
+ .type main, %function
+main:
+ sub sp, sp, #16
+ mov x7, 13
+ str w7, [sp,12]
+ b e843419
+ ret
+ .size main, .-main
+
+ .section .e843419, "xa"
+ .align 2
+ .global e843419
+ .type e843419, %function
+e843419:
+ sub sp, sp, #16
+ mov x7, 13
+ str w7, [sp,12]
+ b e843419_1
+ .fill 4072,1,0
+e843419_1:
+ adrp x0, data0
+ str x7, [x0,12]
+ mov x8, 9
+ str x8, [x0, :lo12:data0]
+
+ add x0, x1, x5
+ ldr w7, [sp,12]
+ add w0, w7, w7
+ add sp, sp, 16
+ b e835769
+ ret
+ .size e843419, .-e843419
+
+ .section .e835769, "xa"
+ .align 2
+ .global e835769
+ .type e835769, %function
+e835769:
+ ldr w7, [x4,8]!
+ mul w6, w0, w1
+ ldr x4, [x4]
+ madd x5, x2, x3, x6
+ mov x0, x5
+ ret
+ .size e835769, .-e835769
+
+# ---
+
+
+
+
+
+# ---
+
+ .data
+data0:
+ .fill 8,1,255
+ .balign 512
+ .fill 4,1,255
+ # double word access that crosses a 64 bit boundary
+data1:
+ .fill 2,1,255
+
+ # word access that crosses a 64 boundary
+data2:
+ .fill 2,1,255
+
+data5:
+ .fill 4,1,255
+
+ # double word access that crosses a 128 boundary
+data3:
+ .fill 2,1,255
+
+ # word access that crosses a 128 bit boundary
+data4:
+ .fill 2,1,255
+data6:
+ .fill 496,1,255