diff options
Diffstat (limited to 'ld/testsuite')
54 files changed, 727 insertions, 2 deletions
diff --git a/ld/testsuite/ld-ifunc/ifunc.exp b/ld/testsuite/ld-ifunc/ifunc.exp index 63ab18d41ac..9ed4bd7841a 100644 --- a/ld/testsuite/ld-ifunc/ifunc.exp +++ b/ld/testsuite/ld-ifunc/ifunc.exp @@ -39,7 +39,6 @@ if { ![is_elf_format] || ![supports_gnu_osabi] || [istarget nds32*-*-*] || [istarget nios2-*-*] || [istarget or1k-*-*] - || [istarget riscv*-*-*] || [istarget score*-*-*] || [istarget sh*-*-*] || [istarget tic6x-*-*] @@ -736,7 +735,8 @@ run_ld_link_exec_tests [list \ if { [isnative] && !([istarget "powerpc-*-*"] || [istarget "aarch64*-*-*"] - || [istarget "sparc*-*-*"]) } { + || [istarget "sparc*-*-*"] + || [istarget "riscv*-*-*"]) } { run_ld_link_exec_tests [list \ [list \ "Run pr23169a" \ diff --git a/ld/testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd new file mode 100644 index 00000000000..0de47a4009f --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd @@ -0,0 +1,4 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd new file mode 100644 index 00000000000..e2e7ad923a5 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd @@ -0,0 +1,7 @@ +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+foo\(\)[ ]+foo \+ 0 +#... +Relocation section '.rela.ifunc' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd new file mode 100644 index 00000000000..f9fbd877c58 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd @@ -0,0 +1,7 @@ +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* +#... +Relocation section '.rela.ifunc' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-nonplt.d b/ld/testsuite/ld-riscv-elf/ifunc-nonplt.d new file mode 100644 index 00000000000..e3517d3c654 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-nonplt.d @@ -0,0 +1,11 @@ +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(_GLOBAL_OFFSET_TABLE_.*|.*)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(__DATA_BEGIN__|.*)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-nonplt.s b/ld/testsuite/ld-riscv-elf/ifunc-nonplt.s new file mode 100644 index 00000000000..ce6ca691fa7 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-nonplt.s @@ -0,0 +1,39 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: +.L1: + auipc x1, %got_pcrel_hi (foo) +.ifdef __64_bit__ + ld x1, %pcrel_lo (.L1) (x1) +.else + lw x1, %pcrel_lo (.L1) (x1) +.endif + +.L2: + auipc x2, %pcrel_hi (foo_addr) +.ifdef __64_bit__ + ld x2, %pcrel_lo (.L2) (x2) +.else + lw x2, %pcrel_lo (.L2) (x2) +.endif + ret + .size bar, .-bar + + .data +foo_addr: +.ifdef __64_bit__ + .quad foo +.else + .long foo +.endif diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd new file mode 100644 index 00000000000..6f5218b9678 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd @@ -0,0 +1,7 @@ +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+foo\(\)[ ]+foo \+ 0 +#... +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-01.d b/ld/testsuite/ld-riscv-elf/ifunc-plt-01.d new file mode 100644 index 00000000000..bed9fe67955 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-01.d @@ -0,0 +1,19 @@ +#... +Disassembly of section .plt: +#... +0+[0-9a-f]+ <(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>: +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(_GLOBAL_OFFSET_TABLE_.*|__DATA_BEGIN__.*|.*)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-01.s b/ld/testsuite/ld-riscv-elf/ifunc-plt-01.s new file mode 100644 index 00000000000..65c65cdca57 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-01.s @@ -0,0 +1,31 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: +.L1: + auipc x1, %got_pcrel_hi (foo) +.ifdef __64_bit__ + ld x1, %pcrel_lo (.L1) (x1) +.else + lw x1, %pcrel_lo (.L1) (x1) +.endif + +.L2: + auipc x2, %pcrel_hi (foo) + addi x2, x2, %pcrel_lo (.L2) + + call foo + call foo@plt + + ret + .size bar, .-bar diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd new file mode 100644 index 00000000000..3299aa48f24 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd @@ -0,0 +1,11 @@ +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+foo\(\)[ ]+foo \+ 0 +#... +Relocation section '.rela.ifunc' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+foo\(\)[ ]+foo \+ 0 +#... +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd new file mode 100644 index 00000000000..28a3c992f4b --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd @@ -0,0 +1,7 @@ +Relocation section '.rela.ifunc' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* +#... +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-02.d b/ld/testsuite/ld-riscv-elf/ifunc-plt-02.d new file mode 100644 index 00000000000..b8638b963fd --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-02.d @@ -0,0 +1,21 @@ +#... +Disassembly of section .plt: +#... +0+[0-9a-f]+ <(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>: +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(_GLOBAL_OFFSET_TABLE_.*|.*)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(__DATA_BEGIN__.*|.*)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-02.s b/ld/testsuite/ld-riscv-elf/ifunc-plt-02.s new file mode 100644 index 00000000000..c3022be0e08 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-02.s @@ -0,0 +1,46 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: +.L1: + auipc x1, %got_pcrel_hi (foo) +.ifdef __64_bit__ + ld x1, %pcrel_lo (.L1) (x1) +.else + lw x1, %pcrel_lo (.L1) (x1) +.endif + +.L2: + auipc x2, %pcrel_hi (foo_addr) +.ifdef __64_bit__ + ld x2, %pcrel_lo (.L2) (x2) +.else + lw x2, %pcrel_lo (.L2) (x2) +.endif + +.L3: + auipc x3, %pcrel_hi (foo) + addi x3, x3, %pcrel_lo (.L3) + + call foo + call foo@plt + ret + .size bar, .-bar + + .data +foo_addr: +.ifdef __64_bit__ + .quad foo +.else + .long foo +.endif diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd new file mode 100644 index 00000000000..7bfaa2d266b --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01.d b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01.d new file mode 100644 index 00000000000..d4457c9be3c --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01.d @@ -0,0 +1,13 @@ +#... +Disassembly of section .plt: +#... +0+[0-9a-f]+ <(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>: +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01.s b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01.s new file mode 100644 index 00000000000..89e63260fe2 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-01.s @@ -0,0 +1,17 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: + call foo + ret + .size bar, .-bar diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd new file mode 100644 index 00000000000..7bfaa2d266b --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02.d b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02.d new file mode 100644 index 00000000000..40c0309ee26 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02.d @@ -0,0 +1,15 @@ +#... +Disassembly of section .plt: +#... +0+[0-9a-f]+ <(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>: +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02.s b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02.s new file mode 100644 index 00000000000..e493c47341a --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-call-02.s @@ -0,0 +1,18 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: + call foo@plt + call foo + ret + .size bar, .-bar diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd new file mode 100644 index 00000000000..9be346bd20e --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.ifunc' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd new file mode 100644 index 00000000000..e14b02ba75d --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.ifunc' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-data.d b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data.d new file mode 100644 index 00000000000..1956cc3e101 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data.d @@ -0,0 +1,9 @@ +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(__DATA_BEGIN__.*|.*)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-data.s b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data.s new file mode 100644 index 00000000000..b49bda1279d --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-data.s @@ -0,0 +1,31 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: +.L1: + auipc x1, %pcrel_hi (foo_addr) +.ifdef __64_bit__ + ld x1, %pcrel_lo (.L1) (x1) +.else + lw x1, %pcrel_lo (.L1) (x1) +.endif + ret + .size bar, .-bar + + .data +foo_addr: +.ifdef __64_bit__ + .quad foo +.else + .long foo +.endif diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd new file mode 100644 index 00000000000..41cbc0712c9 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd new file mode 100644 index 00000000000..cef1a77c437 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-got.d b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got.d new file mode 100644 index 00000000000..3277e8f10bd --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got.d @@ -0,0 +1,9 @@ +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(_GLOBAL_OFFSET_TABLE_.*|.*)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-got.s b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got.s new file mode 100644 index 00000000000..eca16d52cfd --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-got.s @@ -0,0 +1,23 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: +.L1: + auipc x1, %got_pcrel_hi (foo) +.ifdef __64_bit__ + ld x1, %pcrel_lo (.L1) (x1) +.else + lw x1, %pcrel_lo (.L1) (x1) +.endif + ret + .size bar, .-bar diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd new file mode 100644 index 00000000000..7bfaa2d266b --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+foo\(\)[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd new file mode 100644 index 00000000000..97461e43ccc --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd @@ -0,0 +1,3 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d new file mode 100644 index 00000000000..bc947e3cf29 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d @@ -0,0 +1,15 @@ +#... +Disassembly of section .plt: +#... +0+[0-9a-f]+ <(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>: +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ <foo_resolver>: +#... +0+[0-9a-f]+ <bar>: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)> +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s new file mode 100644 index 00000000000..7ea454cec58 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s @@ -0,0 +1,26 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver + + .globl bar + .type bar, @function +bar: +.L1: + auipc x1, %pcrel_hi (foo) + addi x1, x1, %pcrel_lo (.L1) +.L2: + auipc x2, %pcrel_hi (foo) +.ifdef __64_bit__ + ld x2, %pcrel_lo (.L2) (x2) +.else + lw x2, %pcrel_lo (.L2) (x2) +.endif + ret + .size bar, .-bar diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s new file mode 100644 index 00000000000..23c7254ad5b --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-nonplt.s @@ -0,0 +1,23 @@ + .text + + # Call the IFUNC `foo` which is defined in the other modules. + .globl foo + .type foo, %function + + .globl main + .type main, @function +main: +.L1: + auipc x1, %got_pcrel_hi (foo) + addi x1, x1, %pcrel_lo (.L1) + +.L2: + auipc x2, %pcrel_hi (foo_addr) + addi x2, x2, %pcrel_lo (.L2) + + ret + .size main, .-main + + .data +foo_addr: + .long foo diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s new file mode 100644 index 00000000000..2d29bcd121b --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s @@ -0,0 +1,14 @@ + .text + + # Call the IFUNC `foo` which is defined in the other modules. + .globl foo + .type foo, %function + + .globl main + .type main, @function +main: +.L1: + auipc x1, %pcrel_hi (foo) + addi x1, x1, %pcrel_lo (.L1) + ret + .size main, .-main diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s new file mode 100644 index 00000000000..8aa64034706 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-caller-plt.s @@ -0,0 +1,26 @@ + .text + + # Call the IFUNC `foo` which is defined in the other modules. + .globl foo + .type foo, %function + + .globl main + .type main, @function +main: +.L1: + auipc x1, %got_pcrel_hi (foo) + addi x1, x1, %pcrel_lo (.L1) + +.L2: + auipc x2, %pcrel_hi (foo_addr) + addi x2, x2, %pcrel_lo (.L2) + + call foo + call foo@plt + + ret + .size main, .-main + + .data +foo_addr: + .long foo diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-exe.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-exe.d new file mode 100644 index 00000000000..540a21bc0a3 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-exe.d @@ -0,0 +1,14 @@ +#name: Link shared ifunc resolver with non-PLT caller (exe) +#source: ifunc-seperate-caller-nonplt.s +#as: +#ld: -z nocombreloc tmpdir/ifunc-seperate-resolver.so +#warning: .* +#readelf: -rW + +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+[0-9a-f]+[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-pic.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-pic.d new file mode 100644 index 00000000000..3ed1812cbf5 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-pic.d @@ -0,0 +1,13 @@ +#name: Link shared ifunc resolver with non-PLT caller (pic) +#source: ifunc-seperate-caller-nonplt.s +#as: +#ld: -z nocombreloc -shared tmpdir/ifunc-seperate-resolver.so +#readelf: -rW + +Relocation section '.rela.data' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-pie.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-pie.d new file mode 100644 index 00000000000..c9c9eabaeb0 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-nonplt-pie.d @@ -0,0 +1,14 @@ +#name: Link shared ifunc resolver with non-PLT caller (pie) +#source: ifunc-seperate-caller-nonplt.s +#as: +#ld: -z nocombreloc -pie tmpdir/ifunc-seperate-resolver.so +#warning: .* +#readelf: -rW + +Relocation section '.rela.data' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d new file mode 100644 index 00000000000..1c11a2d15b2 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d @@ -0,0 +1,5 @@ +#name: Link shared IFUNC resolver with PCREL caller (pic) +#source: ifunc-seperate-caller-pcrel.s +#as: +#ld: -z nocombreloc -shared tmpdir/ifunc-seperate-resolver.so +#error: .*unresolvable R_RISCV_PCREL_HI20 relocation.* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d new file mode 100644 index 00000000000..0d0e3cc1c82 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d @@ -0,0 +1,5 @@ +#name: Link shared IFUNC resolver with PCREL caller (pie) +#source: ifunc-seperate-caller-pcrel.s +#as: +#ld: -z nocombreloc -pie tmpdir/ifunc-seperate-resolver.so +#error: .*unresolvable R_RISCV_PCREL_HI20 relocation.* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-exe.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-exe.d new file mode 100644 index 00000000000..a5385641868 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-exe.d @@ -0,0 +1,14 @@ +#name: Link shared ifunc resolver with PLT caller (exe) +#source: ifunc-seperate-caller-plt.s +#as: +#ld: -z nocombreloc tmpdir/ifunc-seperate-resolver.so +#warning: .* +#readelf: -rW + +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+[0-9a-f]+[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-pic.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-pic.d new file mode 100644 index 00000000000..9efa244f044 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-pic.d @@ -0,0 +1,17 @@ +#name: Link shared ifunc resolver with PLT caller (pic) +#source: ifunc-seperate-caller-plt.s +#as: +#ld: -z nocombreloc -shared tmpdir/ifunc-seperate-resolver.so +#readelf: -rW + +Relocation section '.rela.data' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+[0-9a-f]+[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-pie.d b/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-pie.d new file mode 100644 index 00000000000..8349e61ed48 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-plt-pie.d @@ -0,0 +1,18 @@ +#name: Link shared ifunc resolver with PLT caller (pie) +#source: ifunc-seperate-caller-plt.s +#as: +#ld: -z nocombreloc -pie tmpdir/ifunc-seperate-resolver.so +#warning: .* +#readelf: -rW + +Relocation section '.rela.data' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.got' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_(32|64)[ ]+[0-9a-f]+[ ]+foo \+ 0 +#... +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_JUMP_SLOT[ ]+[0-9a-f]+[ ]+foo \+ 0 diff --git a/ld/testsuite/ld-riscv-elf/ifunc-seperate-resolver.s b/ld/testsuite/ld-riscv-elf/ifunc-seperate-resolver.s new file mode 100644 index 00000000000..a2228473422 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-seperate-resolver.s @@ -0,0 +1,11 @@ + .text + + .type foo_resolver, @function +foo_resolver: + ret + .size foo_resolver, .-foo_resolver + + # The ifunc `foo` is called by the ifunc-caller. + .globl foo + .type foo, %gnu_indirect_function + .set foo, foo_resolver diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp index 2c008d4c35c..b82e0921afd 100644 --- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp +++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp @@ -19,6 +19,47 @@ # MA 02110-1301, USA. # +# target: rv32 or rv64. +# output: Which output you want? (exe, pie, .so) +proc run_dump_test_ifunc { name target output} { + set asflags "" + set ldflags "-z nocombreloc" + + switch -- $output { + exe { + set ext "exe" + } + pie { + set ext "pie" + set ldflags "$ldflags -pie" + } + pic { + set ext "so" + set ldflags "$ldflags -shared" + } + } + + switch -- $target { + rv32 { + set asflags "$asflags -march=rv32i -mabi=ilp32" + set ldflags "$ldflags -melf32lriscv" + } + rv64 { + set asflags "$asflags -march=rv64i -mabi=lp64 -defsym __64_bit__=1" + set ldflags "$ldflags -melf64lriscv" + } + } + + run_ld_link_tests [list \ + [list "$name ($target-$output)" \ + "$ldflags" "" \ + "$asflags" \ + [list "$name.s"] \ + [concat [list "readelf -rW $name-$output.rd"] \ + [list "objdump -dw $name.d"]] \ + "$name-$target.$ext"]] +} + if [istarget "riscv*-*-*"] { run_dump_test "call-relax" run_dump_test "c-lui" @@ -88,4 +129,74 @@ if [istarget "riscv*-*-*"] { {} "lib-nopic-01a.so" } } run_dump_test "lib-nopic-01b" + + # IFUNC testcases. + # Check IFUNC by single type relocs. + run_dump_test_ifunc "ifunc-reloc-call-01" rv32 exe + run_dump_test_ifunc "ifunc-reloc-call-01" rv32 pie + run_dump_test_ifunc "ifunc-reloc-call-01" rv32 pic + run_dump_test_ifunc "ifunc-reloc-call-02" rv32 exe + run_dump_test_ifunc "ifunc-reloc-call-02" rv32 pie + run_dump_test_ifunc "ifunc-reloc-call-02" rv32 pic + run_dump_test_ifunc "ifunc-reloc-pcrel" rv32 exe + run_dump_test_ifunc "ifunc-reloc-pcrel" rv32 pie + run_dump_test_ifunc "ifunc-reloc-pcrel" rv32 pic + run_dump_test_ifunc "ifunc-reloc-data" rv32 exe + run_dump_test_ifunc "ifunc-reloc-data" rv32 pie + run_dump_test_ifunc "ifunc-reloc-data" rv32 pic + run_dump_test_ifunc "ifunc-reloc-got" rv32 exe + run_dump_test_ifunc "ifunc-reloc-got" rv32 pie + run_dump_test_ifunc "ifunc-reloc-got" rv32 pic + run_dump_test_ifunc "ifunc-reloc-pcrel" rv64 exe + run_dump_test_ifunc "ifunc-reloc-pcrel" rv64 pie + run_dump_test_ifunc "ifunc-reloc-pcrel" rv64 pic + run_dump_test_ifunc "ifunc-reloc-data" rv64 exe + run_dump_test_ifunc "ifunc-reloc-data" rv64 pie + run_dump_test_ifunc "ifunc-reloc-data" rv64 pic + run_dump_test_ifunc "ifunc-reloc-got" rv64 exe + run_dump_test_ifunc "ifunc-reloc-got" rv64 pie + run_dump_test_ifunc "ifunc-reloc-got" rv64 pic + # Check the IFUNC PLT and non-PLT relocs. + run_dump_test_ifunc "ifunc-nonplt" rv32 exe + run_dump_test_ifunc "ifunc-nonplt" rv32 pie + run_dump_test_ifunc "ifunc-nonplt" rv32 pic + run_dump_test_ifunc "ifunc-plt-01" rv32 exe + run_dump_test_ifunc "ifunc-plt-01" rv32 pie + run_dump_test_ifunc "ifunc-plt-01" rv32 pic + run_dump_test_ifunc "ifunc-plt-02" rv32 exe + run_dump_test_ifunc "ifunc-plt-02" rv32 pie + run_dump_test_ifunc "ifunc-plt-02" rv32 pic + run_dump_test_ifunc "ifunc-nonplt" rv64 exe + run_dump_test_ifunc "ifunc-nonplt" rv64 pie + run_dump_test_ifunc "ifunc-nonplt" rv64 pic + run_dump_test_ifunc "ifunc-plt-01" rv64 exe + run_dump_test_ifunc "ifunc-plt-01" rv64 pie + run_dump_test_ifunc "ifunc-plt-01" rv64 pic + run_dump_test_ifunc "ifunc-plt-02" rv64 exe + run_dump_test_ifunc "ifunc-plt-02" rv64 pie + run_dump_test_ifunc "ifunc-plt-02" rv64 pic + + # Setup shared libraries. + run_ld_link_tests { + { "Build shared library for IFUNC non-PLT caller" + "-shared" "" "" {ifunc-seperate-caller-nonplt.s} + {} "ifunc-seperate-caller.so" } + { "Build shared library for IFUNC PLT caller" + "-shared" "" "" {ifunc-seperate-caller-plt.s} + {} "ifunc-seperate-caller.so" } + { "Build shared library for IFUNC resolver" + "-shared" "" "" {ifunc-seperate-resolver.s} + {} "ifunc-seperate-resolver.so" } + } + # The IFUNC resolver and caller are in the seperate modules. + # If IFUNC resolver and caller are linked to the same module, + # then the result are the same as the run_dump_test_ifunc. + run_dump_test "ifunc-seperate-nonplt-exe" + run_dump_test "ifunc-seperate-nonplt-pie" + run_dump_test "ifunc-seperate-nonplt-pic" + run_dump_test "ifunc-seperate-plt-exe" + run_dump_test "ifunc-seperate-plt-pie" + run_dump_test "ifunc-seperate-plt-pic" + run_dump_test "ifunc-seperate-pcrel-pie" + run_dump_test "ifunc-seperate-pcrel-pic" } |