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-rw-r--r--include/opcode/ChangeLog5
-rw-r--r--include/opcode/mips.h16
2 files changed, 13 insertions, 8 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 26621b5b63b..16356843c1d 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * mips.h: Updated description of +o, +u, +v and +w for MIPS and
+ microMIPS.
+
2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
Wei-Cheng Wang <cole945@gmail.com>
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index c9dc52b8b85..7ea0900b9a4 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -910,10 +910,10 @@ struct mips_opcode
"+k" 5-bit GPR at bit 6
"+l" 5-bit MSA control register at bit 6
"+n" 5-bit MSA control register at bit 11
- "+o" 5-bit vector element index at bit 16
- "+u" 4-bit vector element index at bit 16
- "+v" 3-bit vector element index at bit 16
- "+w" 2-bit vector element index at bit 16
+ "+o" 4-bit vector element index at bit 16
+ "+u" 3-bit vector element index at bit 16
+ "+v" 2-bit vector element index at bit 16
+ "+w" 1-bit vector element index at bit 16
"+T" (-512 .. 511) << 0 at bit 16
"+U" (-512 .. 511) << 1 at bit 16
"+V" (-512 .. 511) << 2 at bit 16
@@ -2093,10 +2093,10 @@ extern const int bfd_mips16_num_opcodes;
"+k" 5-bit GPR at bit 6
"+l" 5-bit MSA control register at bit 6
"+n" 5-bit MSA control register at bit 11
- "+o" 5-bit vector element index at bit 16
- "+u" 4-bit vector element index at bit 16
- "+v" 3-bit vector element index at bit 16
- "+w" 2-bit vector element index at bit 16
+ "+o" 4-bit vector element index at bit 16
+ "+u" 3-bit vector element index at bit 16
+ "+v" 2-bit vector element index at bit 16
+ "+w" 1-bit vector element index at bit 16
"+x" 5-bit shift amount at bit 16
"+T" (-512 .. 511) << 0 at bit 16
"+U" (-512 .. 511) << 1 at bit 16