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-rw-r--r--gas/testsuite/gas/i386/x86_64-intel.d24
-rw-r--r--gas/testsuite/gas/i386/x86_64.d24
2 files changed, 24 insertions, 24 deletions
diff --git a/gas/testsuite/gas/i386/x86_64-intel.d b/gas/testsuite/gas/i386/x86_64-intel.d
index a2d5668eebf..bd99ce0db51 100644
--- a/gas/testsuite/gas/i386/x86_64-intel.d
+++ b/gas/testsuite/gas/i386/x86_64-intel.d
@@ -260,34 +260,34 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 89 0c 25 00 00 00 00 mov QWORD PTR (ds:)?0x0,rcx
[ ]*[a-f0-9]+: 66 0f 02 d2 lar dx,dx
[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar rdx,rdx
[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar rdx,rdx
+[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
+[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
[ ]*[a-f0-9]+: 66 0f 02 12 lar dx,WORD PTR \[rdx\]
[ ]*[a-f0-9]+: 0f 02 12 lar edx,WORD PTR \[rdx\]
-[ ]*[a-f0-9]+: 48 0f 02 12 lar rdx,WORD PTR \[rdx\]
+[ ]*[a-f0-9]+: 0f 02 12 lar edx,WORD PTR \[rdx\]
[ ]*[a-f0-9]+: 66 0f 03 d2 lsl dx,dx
[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl rdx,rdx
[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl rdx,rdx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
[ ]*[a-f0-9]+: 66 0f 03 12 lsl dx,WORD PTR \[rdx\]
[ ]*[a-f0-9]+: 0f 03 12 lsl edx,WORD PTR \[rdx\]
-[ ]*[a-f0-9]+: 48 0f 03 12 lsl rdx,WORD PTR \[rdx\]
+[ ]*[a-f0-9]+: 0f 03 12 lsl edx,WORD PTR \[rdx\]
[ ]*[a-f0-9]+: 66 0f 02 d2 lar dx,dx
[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar rdx,rdx
[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar rdx,rdx
+[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
+[ ]*[a-f0-9]+: 0f 02 d2 lar edx,edx
[ ]*[a-f0-9]+: 66 0f 02 12 lar dx,WORD PTR \[rdx\]
[ ]*[a-f0-9]+: 0f 02 12 lar edx,WORD PTR \[rdx\]
-[ ]*[a-f0-9]+: 48 0f 02 12 lar rdx,WORD PTR \[rdx\]
+[ ]*[a-f0-9]+: 0f 02 12 lar edx,WORD PTR \[rdx\]
[ ]*[a-f0-9]+: 66 0f 03 d2 lsl dx,dx
[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl rdx,rdx
[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl rdx,rdx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl edx,edx
[ ]*[a-f0-9]+: 66 0f 03 12 lsl dx,WORD PTR \[rdx\]
[ ]*[a-f0-9]+: 0f 03 12 lsl edx,WORD PTR \[rdx\]
-[ ]*[a-f0-9]+: 48 0f 03 12 lsl rdx,WORD PTR \[rdx\]
+[ ]*[a-f0-9]+: 0f 03 12 lsl edx,WORD PTR \[rdx\]
#pass
diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
index 3bd2c269e36..8897bb30d03 100644
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -260,34 +260,34 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 89 0c 25 00 00 00 00 mov %rcx,0x0
[ ]*[a-f0-9]+: 66 0f 02 d2 lar %dx,%dx
[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar %rdx,%rdx
[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar %rdx,%rdx
+[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
+[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
[ ]*[a-f0-9]+: 66 0f 02 12 lar \(%rdx\),%dx
[ ]*[a-f0-9]+: 0f 02 12 lar \(%rdx\),%edx
-[ ]*[a-f0-9]+: 48 0f 02 12 lar \(%rdx\),%rdx
+[ ]*[a-f0-9]+: 0f 02 12 lar \(%rdx\),%edx
[ ]*[a-f0-9]+: 66 0f 03 d2 lsl %dx,%dx
[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl %rdx,%rdx
[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl %rdx,%rdx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
[ ]*[a-f0-9]+: 66 0f 03 12 lsl \(%rdx\),%dx
[ ]*[a-f0-9]+: 0f 03 12 lsl \(%rdx\),%edx
-[ ]*[a-f0-9]+: 48 0f 03 12 lsl \(%rdx\),%rdx
+[ ]*[a-f0-9]+: 0f 03 12 lsl \(%rdx\),%edx
[ ]*[a-f0-9]+: 66 0f 02 d2 lar %dx,%dx
[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar %rdx,%rdx
[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 02 d2 lar %rdx,%rdx
+[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
+[ ]*[a-f0-9]+: 0f 02 d2 lar %edx,%edx
[ ]*[a-f0-9]+: 66 0f 02 12 lar \(%rdx\),%dx
[ ]*[a-f0-9]+: 0f 02 12 lar \(%rdx\),%edx
-[ ]*[a-f0-9]+: 48 0f 02 12 lar \(%rdx\),%rdx
+[ ]*[a-f0-9]+: 0f 02 12 lar \(%rdx\),%edx
[ ]*[a-f0-9]+: 66 0f 03 d2 lsl %dx,%dx
[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl %rdx,%rdx
[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
-[ ]*[a-f0-9]+: 48 0f 03 d2 lsl %rdx,%rdx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
+[ ]*[a-f0-9]+: 0f 03 d2 lsl %edx,%edx
[ ]*[a-f0-9]+: 66 0f 03 12 lsl \(%rdx\),%dx
[ ]*[a-f0-9]+: 0f 03 12 lsl \(%rdx\),%edx
-[ ]*[a-f0-9]+: 48 0f 03 12 lsl \(%rdx\),%rdx
+[ ]*[a-f0-9]+: 0f 03 12 lsl \(%rdx\),%edx
#pass