diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 9 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/advsimd-armv8_3.d | 33 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/advsimd-armv8_3.s | 36 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-fcmla.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-fcmla.l | 17 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-fcmla.s | 25 |
7 files changed, 125 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 560a7bf4657..2ade09ce413 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,14 @@ 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com> + * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_IMM_ROT*. + * testsuite/gas/aarch64/advsimd-armv8_3.d: New. + * testsuite/gas/aarch64/advsimd-armv8_3.s: New. + * testsuite/gas/aarch64/illegal-fcmla.s: New. + * testsuite/gas/aarch64/illegal-fcmla.l: New. + * testsuite/gas/aarch64/illegal-fcmla.d: New. + +2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com> + * testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Add ldaprb, ldaprh, ldapr tests. * testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise. * testsuite/gas/aarch64/illegal-ldapr.s: Likewise. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 9b19d767730..7c518c7f138 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -5561,6 +5561,9 @@ parse_operands (char *str, const aarch64_opcode *opcode) case AARCH64_OPND_SVE_UIMM7: case AARCH64_OPND_SVE_UIMM8: case AARCH64_OPND_SVE_UIMM8_53: + case AARCH64_OPND_IMM_ROT1: + case AARCH64_OPND_IMM_ROT2: + case AARCH64_OPND_IMM_ROT3: po_imm_nc_or_fail (); info->imm.value = val; break; diff --git a/gas/testsuite/gas/aarch64/advsimd-armv8_3.d b/gas/testsuite/gas/aarch64/advsimd-armv8_3.d new file mode 100644 index 00000000000..0e477e4720f --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-armv8_3.d @@ -0,0 +1,33 @@ +#as: -march=armv8.3-a +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0000000000000000 <.*>: +[^:]+: 6ec3c441 fcmla v1.2d, v2.2d, v3.2d, #0 +[^:]+: 6ec3cc41 fcmla v1.2d, v2.2d, v3.2d, #90 +[^:]+: 6ec3d441 fcmla v1.2d, v2.2d, v3.2d, #180 +[^:]+: 6ec3dc41 fcmla v1.2d, v2.2d, v3.2d, #270 +[^:]+: 2e83cc41 fcmla v1.2s, v2.2s, v3.2s, #90 +[^:]+: 6e83cc41 fcmla v1.4s, v2.4s, v3.4s, #90 +[^:]+: 2e43cc41 fcmla v1.4h, v2.4h, v3.4h, #90 +[^:]+: 6e43cc41 fcmla v1.8h, v2.8h, v3.8h, #90 +[^:]+: 6f831041 fcmla v1.4s, v2.4s, v3.s\[0\], #0 +[^:]+: 6f833041 fcmla v1.4s, v2.4s, v3.s\[0\], #90 +[^:]+: 6f835041 fcmla v1.4s, v2.4s, v3.s\[0\], #180 +[^:]+: 6f837041 fcmla v1.4s, v2.4s, v3.s\[0\], #270 +[^:]+: 6f833841 fcmla v1.4s, v2.4s, v3.s\[1\], #90 +[^:]+: 2f433041 fcmla v1.4h, v2.4h, v3.h\[0\], #90 +[^:]+: 2f633041 fcmla v1.4h, v2.4h, v3.h\[1\], #90 +[^:]+: 6f433041 fcmla v1.8h, v2.8h, v3.h\[0\], #90 +[^:]+: 6f633041 fcmla v1.8h, v2.8h, v3.h\[1\], #90 +[^:]+: 6f433841 fcmla v1.8h, v2.8h, v3.h\[2\], #90 +[^:]+: 6f633841 fcmla v1.8h, v2.8h, v3.h\[3\], #90 +[^:]+: 6ec3e441 fcadd v1.2d, v2.2d, v3.2d, #90 +[^:]+: 6ec3f441 fcadd v1.2d, v2.2d, v3.2d, #270 +[^:]+: 2e83e441 fcadd v1.2s, v2.2s, v3.2s, #90 +[^:]+: 6e83e441 fcadd v1.4s, v2.4s, v3.4s, #90 +[^:]+: 2e43e441 fcadd v1.4h, v2.4h, v3.4h, #90 +[^:]+: 6e43e441 fcadd v1.8h, v2.8h, v3.8h, #90 diff --git a/gas/testsuite/gas/aarch64/advsimd-armv8_3.s b/gas/testsuite/gas/aarch64/advsimd-armv8_3.s new file mode 100644 index 00000000000..bfb94e546b3 --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-armv8_3.s @@ -0,0 +1,36 @@ +/* Test file for ARMv8.3 complex arithmetics instructions. */ + .text + + /* Three-same operands FCMLA. */ + fcmla v1.2d, v2.2d, v3.2d, #0 + fcmla v1.2d, v2.2d, v3.2d, #90 + fcmla v1.2d, v2.2d, v3.2d, #180 + fcmla v1.2d, v2.2d, v3.2d, #270 + + fcmla v1.2s, v2.2s, v3.2s, #90 + fcmla v1.4s, v2.4s, v3.4s, #90 + fcmla v1.4h, v2.4h, v3.4h, #90 + fcmla v1.8h, v2.8h, v3.8h, #90 + + /* Indexed element FCMLA. */ + fcmla v1.4s, v2.4s, v3.s[0], #0 + fcmla v1.4s, v2.4s, v3.s[0], #90 + fcmla v1.4s, v2.4s, v3.s[0], #180 + fcmla v1.4s, v2.4s, v3.s[0], #270 + fcmla v1.4s, v2.4s, v3.s[1], #90 + + fcmla v1.4h, v2.4h, v3.h[0], #90 + fcmla v1.4h, v2.4h, v3.h[1], #90 + fcmla v1.8h, v2.8h, v3.h[0], #90 + fcmla v1.8h, v2.8h, v3.h[1], #90 + fcmla v1.8h, v2.8h, v3.h[2], #90 + fcmla v1.8h, v2.8h, v3.h[3], #90 + + /* Three-same operands FADD. */ + fcadd v1.2d, v2.2d, v3.2d, #90 + fcadd v1.2d, v2.2d, v3.2d, #270 + + fcadd v1.2s, v2.2s, v3.2s, #90 + fcadd v1.4s, v2.4s, v3.4s, #90 + fcadd v1.4h, v2.4h, v3.4h, #90 + fcadd v1.8h, v2.8h, v3.8h, #90 diff --git a/gas/testsuite/gas/aarch64/illegal-fcmla.d b/gas/testsuite/gas/aarch64/illegal-fcmla.d new file mode 100644 index 00000000000..af94c51f950 --- /dev/null +++ b/gas/testsuite/gas/aarch64/illegal-fcmla.d @@ -0,0 +1,2 @@ +#as: -march=armv8.3-a -mno-verbose-error +#error-output: illegal-fcmla.l diff --git a/gas/testsuite/gas/aarch64/illegal-fcmla.l b/gas/testsuite/gas/aarch64/illegal-fcmla.l new file mode 100644 index 00000000000..1c0f1e41aa9 --- /dev/null +++ b/gas/testsuite/gas/aarch64/illegal-fcmla.l @@ -0,0 +1,17 @@ +[^:]*: Assembler messages: +[^:]+:10: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla v0\.4s,v1\.4s,v2\.s\[0\],#-90' +[^:]+:11: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla v0\.4s,v1\.4s,v2\.s\[0\],#30' +[^:]+:12: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla v0\.4s,v1\.4s,v2\.s\[0\],#360' +[^:]+:13: Error: register element index out of range 0 to 1 at operand 3 -- `fcmla v0\.4h,v1\.4h,v2\.h\[2\],#90' +[^:]+:14: Error: register element index out of range 0 to 3 at operand 3 -- `fcmla v0\.8h,v1\.8h,v2\.h\[4\],#90' +[^:]+:15: Error: register element index out of range 0 to 1 at operand 3 -- `fcmla v0\.4s,v1\.4s,v2\.s\[2\],#90' +[^:]+:16: Error: operand mismatch -- `fcmla v0\.2s,v1\.2s,v2\.s\[0\],#90' +[^:]+:17: Error: operand mismatch -- `fcmla v0\.4s,v1\.4s,v2\.d\[0\],#90' +[^:]+:18: Error: operand mismatch -- `fcmla v0\.2d,v1\.2d,v2\.d\[0\],#0' +[^:]+:19: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla v0\.4s,v1\.4s,v2\.4s,#-90' +[^:]+:20: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla v0\.4s,v1\.4s,v2\.4s,#30' +[^:]+:21: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla v0\.4s,v1\.4s,v2\.4s,#360' +[^:]+:22: Error: invalid element size 8 and vector size combination s at operand 1 -- `fcmla v0\.8s,v1\.8s,v2\.8s,#0' +[^:]+:23: Error: operand mismatch -- `fcmla v0\.1d,v1\.1d,v2\.1d,#0' +[^:]+:24: Error: rotate expected to be 90 or 270 at operand 4 -- `fcadd v0\.4h,v1\.4h,v2\.4h,#0' +[^:]+:25: Error: rotate expected to be 90 or 270 at operand 4 -- `fcadd v0\.4h,v1\.4h,v2\.4h,#180' diff --git a/gas/testsuite/gas/aarch64/illegal-fcmla.s b/gas/testsuite/gas/aarch64/illegal-fcmla.s new file mode 100644 index 00000000000..882c7bab89d --- /dev/null +++ b/gas/testsuite/gas/aarch64/illegal-fcmla.s @@ -0,0 +1,25 @@ +// Test illegal ARMv8.3 FCMLA and FCADD instructions with -march=armv8.3-a. +.text + + // Good. + fcmla v0.4s, v1.4s, v2.s[0], #90 + fcmla v0.4s, v1.4s, v2.4s, #90 + fcadd v0.4h, v1.4h, v2.4h, #90 + + // Bad. + fcmla v0.4s, v1.4s, v2.s[0], #-90 + fcmla v0.4s, v1.4s, v2.s[0], #30 + fcmla v0.4s, v1.4s, v2.s[0], #360 + fcmla v0.4h, v1.4h, v2.h[2], #90 + fcmla v0.8h, v1.8h, v2.h[4], #90 + fcmla v0.4s, v1.4s, v2.s[2], #90 + fcmla v0.2s, v1.2s, v2.s[0], #90 + fcmla v0.4s, v1.4s, v2.d[0], #90 + fcmla v0.2d, v1.2d, v2.d[0], #0 + fcmla v0.4s, v1.4s, v2.4s, #-90 + fcmla v0.4s, v1.4s, v2.4s, #30 + fcmla v0.4s, v1.4s, v2.4s, #360 + fcmla v0.8s, v1.8s, v2.8s, #0 + fcmla v0.1d, v1.1d, v2.1d, #0 + fcadd v0.4h, v1.4h, v2.4h, #0 + fcadd v0.4h, v1.4h, v2.4h, #180 |