diff options
Diffstat (limited to 'gas/testsuite/gas')
44 files changed, 688 insertions, 0 deletions
diff --git a/gas/testsuite/gas/mips/isa-override-1.d b/gas/testsuite/gas/mips/isa-override-1.d new file mode 100644 index 00000000000..70f34e24747 --- /dev/null +++ b/gas/testsuite/gas/mips/isa-override-1.d @@ -0,0 +1,49 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 44a11000 dmtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/gas/testsuite/gas/mips/isa-override-1.s b/gas/testsuite/gas/mips/isa-override-1.s new file mode 100644 index 00000000000..9a38981e847 --- /dev/null +++ b/gas/testsuite/gas/mips/isa-override-1.s @@ -0,0 +1,31 @@ + .text + .globl foo + .ent foo +foo: + ld $2, 0($4) + or $2, 0x89ab0000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .set push + .set mips3 + ld $2, 0($4) + or $2, 0x89ab0000 + dli $2, 0x9000000080000000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .set mips0 + ld $2, 0($4) + or $2, 0x89ab0000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .set mips3 + .set pop + ld $2, 0($4) + or $2, 0x89ab0000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/isa-override-2.l b/gas/testsuite/gas/mips/isa-override-2.l new file mode 100644 index 00000000000..cd215bcdc5f --- /dev/null +++ b/gas/testsuite/gas/mips/isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: number \(0x9000000080000000\) larger than 32 bits +.*:10: Error: number \(0x9000000080000000\) larger than 32 bits +.*:13: Error: number \(0x9000000080000000\) larger than 32 bits diff --git a/gas/testsuite/gas/mips/isa-override-2.s b/gas/testsuite/gas/mips/isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/micromips@isa-override-1.d b/gas/testsuite/gas/mips/micromips@isa-override-1.d new file mode 100644 index 00000000000..e600ff8ea34 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@isa-override-1.d @@ -0,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc44 0000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 5020 89ab li at,0x89ab +[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> 41a2 9000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 5842 8000 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 5042 8000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 5842 8000 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 5021 89ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 5422 2c3b dmtc1 at,\$2 +[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 1949cd8f9f8..2f29b20eb7a 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1440,6 +1440,9 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "li-d" + run_dump_test_arches "isa-override-1" "" [mips_arch_list_matching mips1] + run_list_test_arches "isa-override-2" "-32" [mips_arch_list_matching mips1] + run_dump_test_arches "r6" [mips_arch_list_matching mips32r6] if $has_newabi { run_dump_test_arches "r6-n32" [mips_arch_list_matching mips64r6] diff --git a/gas/testsuite/gas/mips/mips1@isa-override-1.d b/gas/testsuite/gas/mips/mips1@isa-override-1.d new file mode 100644 index 00000000000..80371b81392 --- /dev/null +++ b/gas/testsuite/gas/mips/mips1@isa-override-1.d @@ -0,0 +1,53 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\) +[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 0xdc820000 +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> d4820000 0xd4820000 +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 44a11000 0x44a11000 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\) +[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\) +[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips1@isa-override-2.l b/gas/testsuite/gas/mips/mips1@isa-override-2.l new file mode 100644 index 00000000000..2ec668427b2 --- /dev/null +++ b/gas/testsuite/gas/mips/mips1@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/mips1@isa-override-2.s b/gas/testsuite/gas/mips/mips1@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/mips1@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips2@isa-override-1.d b/gas/testsuite/gas/mips/mips2@isa-override-1.d new file mode 100644 index 00000000000..5341e0dc53a --- /dev/null +++ b/gas/testsuite/gas/mips/mips2@isa-override-1.d @@ -0,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ldc3 \$2,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 44a11000 0x44a11000 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips2@isa-override-2.l b/gas/testsuite/gas/mips/mips2@isa-override-2.l new file mode 100644 index 00000000000..19ad921f411 --- /dev/null +++ b/gas/testsuite/gas/mips/mips2@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/mips2@isa-override-2.s b/gas/testsuite/gas/mips/mips2@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/mips2@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips32@isa-override-1.d b/gas/testsuite/gas/mips/mips32@isa-override-1.d new file mode 100644 index 00000000000..75a8f0a0630 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/mips32@isa-override-2.l b/gas/testsuite/gas/mips/mips32@isa-override-2.l new file mode 100644 index 00000000000..2f693d63b37 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/mips32@isa-override-2.s b/gas/testsuite/gas/mips/mips32@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips32r2@isa-override-1.d b/gas/testsuite/gas/mips/mips32r2@isa-override-1.d new file mode 100644 index 00000000000..0ab21b972af --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2@isa-override-1.d @@ -0,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ldc3 \$2,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 44a11000 0x44a11000 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips32r2@isa-override-2.l b/gas/testsuite/gas/mips/mips32r2@isa-override-2.l new file mode 100644 index 00000000000..d4d4aea98fb --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/mips32r2@isa-override-2.s b/gas/testsuite/gas/mips/mips32r2@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips32r3@isa-override-1.d b/gas/testsuite/gas/mips/mips32r3@isa-override-1.d new file mode 100644 index 00000000000..5aa2f5b8777 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r3@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips32r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/mips32r3@isa-override-2.l b/gas/testsuite/gas/mips/mips32r3@isa-override-2.l new file mode 100644 index 00000000000..a32137d3747 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r3@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/mips32r3@isa-override-2.s b/gas/testsuite/gas/mips/mips32r3@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r3@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips32r5@isa-override-1.d b/gas/testsuite/gas/mips/mips32r5@isa-override-1.d new file mode 100644 index 00000000000..5aa2f5b8777 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r5@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips32r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/mips32r5@isa-override-2.l b/gas/testsuite/gas/mips/mips32r5@isa-override-2.l new file mode 100644 index 00000000000..dedc04faadb --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r5@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/mips32r5@isa-override-2.s b/gas/testsuite/gas/mips/mips32r5@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r5@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips32r6@isa-override-1.d b/gas/testsuite/gas/mips/mips32r6@isa-override-1.d new file mode 100644 index 00000000000..5aa2f5b8777 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r6@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips32r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/mips32r6@isa-override-2.l b/gas/testsuite/gas/mips/mips32r6@isa-override-2.l new file mode 100644 index 00000000000..dda7cdfbcd2 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r6@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/mips32r6@isa-override-2.s b/gas/testsuite/gas/mips/mips32r6@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r6@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips64r2@isa-override-1.d b/gas/testsuite/gas/mips/mips64r2@isa-override-1.d new file mode 100644 index 00000000000..d53fb2cc39d --- /dev/null +++ b/gas/testsuite/gas/mips/mips64r2@isa-override-1.d @@ -0,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 44a11000 dmtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips64r3@isa-override-1.d b/gas/testsuite/gas/mips/mips64r3@isa-override-1.d new file mode 100644 index 00000000000..79873cc7823 --- /dev/null +++ b/gas/testsuite/gas/mips/mips64r3@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/mips64r5@isa-override-1.d b/gas/testsuite/gas/mips/mips64r5@isa-override-1.d new file mode 100644 index 00000000000..79873cc7823 --- /dev/null +++ b/gas/testsuite/gas/mips/mips64r5@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/mips64r6@isa-override-1.d b/gas/testsuite/gas/mips/mips64r6@isa-override-1.d new file mode 100644 index 00000000000..79873cc7823 --- /dev/null +++ b/gas/testsuite/gas/mips/mips64r6@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-1.d b/gas/testsuite/gas/mips/octeon3@isa-override-1.d new file mode 100644 index 00000000000..dc3e9c56dc4 --- /dev/null +++ b/gas/testsuite/gas/mips/octeon3@isa-override-1.d @@ -0,0 +1,6 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#stderr: octeon3@isa-override-1.l +#dump: mips64r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-1.l b/gas/testsuite/gas/mips/octeon3@isa-override-1.l new file mode 100644 index 00000000000..3774f17b399 --- /dev/null +++ b/gas/testsuite/gas/mips/octeon3@isa-override-1.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*:10: Warning: the `virt' extension requires MIPS64 revision 2 or greater diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-2.l b/gas/testsuite/gas/mips/octeon3@isa-override-2.l new file mode 100644 index 00000000000..6ca0d8d9ef2 --- /dev/null +++ b/gas/testsuite/gas/mips/octeon3@isa-override-2.l @@ -0,0 +1,5 @@ +.*: Assembler messages: +.*:5: Error: number \(0x9000000080000000\) larger than 32 bits +.*:7: Warning: the `virt' extension requires MIPS64 revision 2 or greater +.*:10: Error: number \(0x9000000080000000\) larger than 32 bits +.*:13: Error: number \(0x9000000080000000\) larger than 32 bits diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-2.s b/gas/testsuite/gas/mips/octeon3@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/octeon3@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/octeon@isa-override-1.d b/gas/testsuite/gas/mips/octeon@isa-override-1.d new file mode 100644 index 00000000000..79873cc7823 --- /dev/null +++ b/gas/testsuite/gas/mips/octeon@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/gas/testsuite/gas/mips/r3000@isa-override-1.d b/gas/testsuite/gas/mips/r3000@isa-override-1.d new file mode 100644 index 00000000000..8e090ef1d1c --- /dev/null +++ b/gas/testsuite/gas/mips/r3000@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips1@isa-override-1.d diff --git a/gas/testsuite/gas/mips/r3000@isa-override-2.l b/gas/testsuite/gas/mips/r3000@isa-override-2.l new file mode 100644 index 00000000000..2ec668427b2 --- /dev/null +++ b/gas/testsuite/gas/mips/r3000@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/r3000@isa-override-2.s b/gas/testsuite/gas/mips/r3000@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/r3000@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/r3900@isa-override-1.d b/gas/testsuite/gas/mips/r3900@isa-override-1.d new file mode 100644 index 00000000000..8e090ef1d1c --- /dev/null +++ b/gas/testsuite/gas/mips/r3900@isa-override-1.d @@ -0,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips1@isa-override-1.d diff --git a/gas/testsuite/gas/mips/r3900@isa-override-2.l b/gas/testsuite/gas/mips/r3900@isa-override-2.l new file mode 100644 index 00000000000..18c982ad257 --- /dev/null +++ b/gas/testsuite/gas/mips/r3900@isa-override-2.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000' diff --git a/gas/testsuite/gas/mips/r3900@isa-override-2.s b/gas/testsuite/gas/mips/r3900@isa-override-2.s new file mode 100644 index 00000000000..402c1182955 --- /dev/null +++ b/gas/testsuite/gas/mips/r3900@isa-override-2.s @@ -0,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/r5900@isa-override-1.d b/gas/testsuite/gas/mips/r5900@isa-override-1.d new file mode 100644 index 00000000000..7e9c0e2eb3d --- /dev/null +++ b/gas/testsuite/gas/mips/r5900@isa-override-1.d @@ -0,0 +1,28 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at + \.\.\. diff --git a/gas/testsuite/gas/mips/r5900@isa-override-1.s b/gas/testsuite/gas/mips/r5900@isa-override-1.s new file mode 100644 index 00000000000..02352f85547 --- /dev/null +++ b/gas/testsuite/gas/mips/r5900@isa-override-1.s @@ -0,0 +1,23 @@ + .text + .globl foo + .ent foo +foo: + ld $2, 0($4) + or $2, 0x89ab0000 + .set push + .set mips3 + ld $2, 0($4) + or $2, 0x89ab0000 + dli $2, 0x9000000080000000 + .set mips0 + ld $2, 0($4) + or $2, 0x89ab0000 + .set mips3 + .set pop + ld $2, 0($4) + or $2, 0x89ab0000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 |