diff options
Diffstat (limited to 'gas/config/tc-metag.c')
| -rw-r--r-- | gas/config/tc-metag.c | 348 |
1 files changed, 174 insertions, 174 deletions
diff --git a/gas/config/tc-metag.c b/gas/config/tc-metag.c index 28666bef3f0..961c11f3b0d 100644 --- a/gas/config/tc-metag.c +++ b/gas/config/tc-metag.c @@ -380,7 +380,7 @@ parse_fpu_regs (const char *line, const metag_reg **regs, size_t count) } /* Return TRUE if REG1 and REG2 are in paired units. */ -static bfd_boolean +static bool is_unit_pair (const metag_reg *reg1, const metag_reg *reg2) { if ((reg1->unit == UNIT_A0 && @@ -391,22 +391,22 @@ is_unit_pair (const metag_reg *reg1, const metag_reg *reg2) (reg2->unit == UNIT_D1)) || (reg1->unit == UNIT_D1 && (reg2->unit == UNIT_D0))) - return TRUE; + return true; - return FALSE; + return false; } /* Return TRUE if REG1 and REG2 form a register pair. */ -static bfd_boolean +static bool is_reg_pair (const metag_reg *reg1, const metag_reg *reg2) { if (reg1->unit == UNIT_FX && reg2->unit == UNIT_FX && reg2->no == reg1->no + 1) - return TRUE; + return true; if (reg1->no != reg2->no) - return FALSE; + return false; return is_unit_pair (reg1, reg2); } @@ -472,7 +472,7 @@ parse_mov_port (const char *line, metag_insn *insn, const insn_template *template) { const char *l = line; - bfd_boolean is_movl = MINOR_OPCODE (template->meta_opcode) == MOVL_MINOR; + bool is_movl = MINOR_OPCODE (template->meta_opcode) == MOVL_MINOR; const metag_reg *dest_regs[2]; const metag_reg *port_regs[1]; @@ -847,7 +847,7 @@ parse_addr (const char *line, metag_addr *addr, unsigned int size) /* Parse a GET or pipeline MOV instruction. */ static const char * parse_get (const char *line, const metag_reg **regs, metag_addr *addr, - unsigned int size, bfd_boolean is_mov) + unsigned int size, bool is_mov) { const char *l = line; @@ -946,7 +946,7 @@ parse_set (const char *line, const metag_reg **regs, metag_addr *addr, /* Check a signed integer value can be represented in the given number of bits. */ -static bfd_boolean +static bool within_signed_range (int value, unsigned int bits) { int min_val = -(1 << (bits - 1)); @@ -956,14 +956,14 @@ within_signed_range (int value, unsigned int bits) /* Check an unsigned integer value can be represented in the given number of bits. */ -static bfd_boolean +static bool within_unsigned_range (unsigned int value, unsigned int bits) { return value < (unsigned int)(1 << bits); } /* Return TRUE if UNIT can be expressed using a short code. */ -static bfd_boolean +static bool is_short_unit (enum metag_unit unit) { switch (unit) @@ -972,9 +972,9 @@ is_short_unit (enum metag_unit unit) case UNIT_A1: case UNIT_D0: case UNIT_D1: - return TRUE; + return true; default: - return FALSE; + return false; } } @@ -995,7 +995,7 @@ parse_get_set (const char *line, metag_insn *insn, const metag_reg *regs[2]; metag_addr addr; unsigned int size = metag_get_set_size_bytes (template->meta_opcode); - bfd_boolean is_get = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; + bool is_get = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; unsigned int reg_no; memset(&addr, 0, sizeof(addr)); @@ -1003,7 +1003,7 @@ parse_get_set (const char *line, metag_insn *insn, if (is_get) { - bfd_boolean is_mov = strncmp (template->name, "MOV", 3) == 0; + bool is_mov = strncmp (template->name, "MOV", 3) == 0; l = parse_get (l, regs, &addr, size, is_mov); @@ -1139,8 +1139,8 @@ parse_get_set_ext (const char *line, metag_insn *insn, const metag_reg *regs[2]; metag_addr addr; unsigned int size = metag_get_set_ext_size_bytes (template->meta_opcode); - bfd_boolean is_get = MINOR_OPCODE (template->meta_opcode) == GET_EXT_MINOR; - bfd_boolean is_mov = MINOR_OPCODE (template->meta_opcode) == MOV_EXT_MINOR; + bool is_get = MINOR_OPCODE (template->meta_opcode) == GET_EXT_MINOR; + bool is_mov = MINOR_OPCODE (template->meta_opcode) == MOV_EXT_MINOR; unsigned int reg_unit; memset(&addr, 0, sizeof(addr)); @@ -1334,9 +1334,9 @@ parse_mset (const char *line, const metag_reg **regs, metag_addr *addr, rmask value if possible. Return the rmask value in RMASK and the lowest numbered register in LOWEST_REG. Return TRUE if the conversion was successful. */ -static bfd_boolean -check_rmask (const metag_reg **regs, size_t regs_read, bfd_boolean is_fpu, - bfd_boolean is_64bit, unsigned int *lowest_reg, +static bool +check_rmask (const metag_reg **regs, size_t regs_read, bool is_fpu, + bool is_64bit, unsigned int *lowest_reg, unsigned int *rmask) { unsigned int reg_unit = regs[0]->unit; @@ -1349,13 +1349,13 @@ check_rmask (const metag_reg **regs, size_t regs_read, bfd_boolean is_fpu, if (is_64bit && regs[i]->no % 2) { as_bad (_("register list must be even numbered")); - return FALSE; + return false; } } else if (regs[i]->unit != reg_unit) { as_bad (_("register list must be from the same unit")); - return FALSE; + return false; } if (regs[i]->no < *lowest_reg) @@ -1378,13 +1378,13 @@ check_rmask (const metag_reg **regs, size_t regs_read, bfd_boolean is_fpu, if (*rmask & next_bit) { as_bad (_("register list must not contain duplicates")); - return FALSE; + return false; } *rmask |= next_bit; } - return TRUE; + return true; } /* Parse an MGET or MSET instruction. */ @@ -1395,9 +1395,9 @@ parse_mget_mset (const char *line, metag_insn *insn, const char *l = line; const metag_reg *regs[MGET_MSET_MAX_REGS]; metag_addr addr; - bfd_boolean is_get = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; - bfd_boolean is_fpu = (MINOR_OPCODE (template->meta_opcode) & 0x6) == 0x6; - bfd_boolean is_64bit = (MINOR_OPCODE (template->meta_opcode) & 0x1) == 0x1; + bool is_get = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; + bool is_fpu = (MINOR_OPCODE (template->meta_opcode) & 0x6) == 0x6; + bool is_64bit = (MINOR_OPCODE (template->meta_opcode) & 0x1) == 0x1; size_t regs_read = 0; unsigned int rmask = 0, reg_unit = 0, lowest_reg = 0xffffffff; @@ -1501,9 +1501,9 @@ parse_mmov (const char *line, metag_insn *insn, const insn_template *template) { const char *l = line; - bfd_boolean is_fpu = template->insn_type == INSN_FPU; - bfd_boolean is_prime = (MINOR_OPCODE (template->meta_opcode) & 0x2) != 0 && !is_fpu; - bfd_boolean is_64bit = (MINOR_OPCODE (template->meta_opcode) & 0x1) != 0; + bool is_fpu = template->insn_type == INSN_FPU; + bool is_prime = (MINOR_OPCODE (template->meta_opcode) & 0x2) != 0 && !is_fpu; + bool is_64bit = (MINOR_OPCODE (template->meta_opcode) & 0x1) != 0; unsigned int rmask = 0; if (is_prime) @@ -1834,8 +1834,8 @@ parse_imm16 (const char *line, metag_insn *insn, int *value) const char *l = line; char *save_input_line_pointer; expressionS *exp = &insn->reloc_exp; - bfd_boolean is_hi = FALSE; - bfd_boolean is_lo = FALSE; + bool is_hi = false; + bool is_lo = false; /* Skip #. */ if (*l == '#') @@ -1845,12 +1845,12 @@ parse_imm16 (const char *line, metag_insn *insn, int *value) if (strncasecmp (l, "HI", 2) == 0) { - is_hi = TRUE; + is_hi = true; l += 2; } else if (strncasecmp (l, "LO", 2) == 0) { - is_lo = TRUE; + is_lo = true; l += 2; } @@ -1965,9 +1965,9 @@ parse_mov_ct (const char *line, metag_insn *insn, { const char *l = line; const metag_reg *regs[1]; - bfd_boolean top = (template->meta_opcode & 0x1) != 0; - bfd_boolean is_trace = ((template->meta_opcode >> 2) & 0x1) != 0; - bfd_boolean sign_extend = 0; + bool top = (template->meta_opcode & 0x1) != 0; + bool is_trace = ((template->meta_opcode >> 2) & 0x1) != 0; + bool sign_extend = 0; int value = 0; l = parse_gp_regs (l, regs, 1); @@ -2078,7 +2078,7 @@ parse_jump (const char *line, metag_insn *insn, if (!is_short_unit (regs[0]->unit)) { as_bad (_("register unit must be one of %s"), SHORT_UNITS); - return FALSE; + return false; } l = skip_comma (l); @@ -2290,16 +2290,16 @@ parse_alu (const char *line, metag_insn *insn, const metag_reg *dest_regs[1]; const metag_reg *src_regs[2]; int value = 0; - bfd_boolean o1z = 0; - bfd_boolean imm = ((template->meta_opcode >> 25) & 0x1) != 0; - bfd_boolean cond = ((template->meta_opcode >> 26) & 0x1) != 0; - bfd_boolean ca = ((template->meta_opcode >> 5) & 0x1) != 0; - bfd_boolean top = (template->meta_opcode & 0x1) != 0; - bfd_boolean sign_extend = 0; - bfd_boolean is_addr_op = MAJOR_OPCODE (template->meta_opcode) == OPC_ADDR; - bfd_boolean is_mul = MAJOR_OPCODE (template->meta_opcode) == OPC_MUL; + bool o1z = 0; + bool imm = ((template->meta_opcode >> 25) & 0x1) != 0; + bool cond = ((template->meta_opcode >> 26) & 0x1) != 0; + bool ca = ((template->meta_opcode >> 5) & 0x1) != 0; + bool top = (template->meta_opcode & 0x1) != 0; + bool sign_extend = 0; + bool is_addr_op = MAJOR_OPCODE (template->meta_opcode) == OPC_ADDR; + bool is_mul = MAJOR_OPCODE (template->meta_opcode) == OPC_MUL; unsigned int unit_bit = 0; - bfd_boolean is_quickrot = (template->arg_type & GP_ARGS_QR) != 0; + bool is_quickrot = (template->arg_type & GP_ARGS_QR) != 0; l = parse_gp_regs (l, dest_regs, 1); @@ -2510,7 +2510,7 @@ parse_alu (const char *line, metag_insn *insn, } else { - bfd_boolean o2r = 0; + bool o2r = 0; int rs2; if (cond || !o1z) @@ -2652,7 +2652,7 @@ parse_alu (const char *line, metag_insn *insn, if (is_quickrot) { const metag_reg *qr_regs[1]; - bfd_boolean limit_regs = imm && cond; + bool limit_regs = imm && cond; l = skip_comma (l); @@ -2786,8 +2786,8 @@ parse_shift (const char *line, metag_insn *insn, const metag_reg *regs[2]; const metag_reg *src2_regs[1]; int value = 0; - bfd_boolean cond = ((template->meta_opcode >> 26) & 0x1) != 0; - bfd_boolean ca = ((template->meta_opcode >> 5) & 0x1) != 0; + bool cond = ((template->meta_opcode >> 26) & 0x1) != 0; + bool ca = ((template->meta_opcode >> 5) & 0x1) != 0; unsigned int unit_bit = 0; l = parse_gp_regs (l, regs, 2); @@ -2909,8 +2909,8 @@ parse_bitop (const char *line, metag_insn *insn, { const char *l = line; const metag_reg *regs[2]; - bfd_boolean swap_inst = MAJOR_OPCODE (template->meta_opcode) == OPC_MISC; - bfd_boolean is_bexl = 0; + bool swap_inst = MAJOR_OPCODE (template->meta_opcode) == OPC_MISC; + bool is_bexl = 0; if (swap_inst && ((template->meta_opcode >> 1) & 0xb) == 0xa) is_bexl = 1; @@ -2964,10 +2964,10 @@ parse_cmp (const char *line, metag_insn *insn, const metag_reg *dest_regs[1]; const metag_reg *src_regs[1]; int value = 0; - bfd_boolean imm = ((template->meta_opcode >> 25) & 0x1) != 0; - bfd_boolean cond = ((template->meta_opcode >> 26) & 0x1) != 0; - bfd_boolean top = (template->meta_opcode & 0x1) != 0; - bfd_boolean sign_extend = 0; + bool imm = ((template->meta_opcode >> 25) & 0x1) != 0; + bool cond = ((template->meta_opcode >> 26) & 0x1) != 0; + bool top = (template->meta_opcode & 0x1) != 0; + bool sign_extend = 0; unsigned int unit_bit = 0; l = parse_gp_regs (l, dest_regs, 1); @@ -3037,7 +3037,7 @@ parse_cmp (const char *line, metag_insn *insn, } else { - bfd_boolean o2r = 0; + bool o2r = 0; int rs2; l = parse_gp_regs (l, src_regs, 1); @@ -3343,8 +3343,8 @@ parse_fmmov (const char *line, metag_insn *insn, const insn_template *template) { const char *l = line; - bfd_boolean to_fpu = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; - bfd_boolean is_mmovl = (MINOR_OPCODE (template->meta_opcode) & 0x1) != 0; + bool to_fpu = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; + bool is_mmovl = (MINOR_OPCODE (template->meta_opcode) & 0x1) != 0; size_t regs_read = 0; const metag_reg *regs[16]; unsigned int lowest_data_reg = 0xffffffff; @@ -3397,7 +3397,7 @@ parse_fmmov (const char *line, metag_insn *insn, else return NULL; - if (!check_rmask (®s[i], regs_read / 2, TRUE, FALSE, &lowest_data_reg, + if (!check_rmask (®s[i], regs_read / 2, true, false, &lowest_data_reg, &rmask)) return NULL; } @@ -3410,7 +3410,7 @@ parse_fmmov (const char *line, metag_insn *insn, else return NULL; - if (!check_rmask (regs, regs_read / 2, TRUE, FALSE, &lowest_data_reg, + if (!check_rmask (regs, regs_read / 2, true, false, &lowest_data_reg, &rmask)) return NULL; @@ -3455,7 +3455,7 @@ parse_fmov_data (const char *line, metag_insn *insn, const insn_template *template) { const char *l = line; - bfd_boolean to_fpu = ((template->meta_opcode >> 7) & 0x1) != 0; + bool to_fpu = ((template->meta_opcode >> 7) & 0x1) != 0; const metag_reg *regs[2]; unsigned int base_unit; @@ -3862,11 +3862,11 @@ parse_fearith (const char *line, metag_insn *insn, { const char *l = line; const metag_reg *regs[3]; - bfd_boolean is_muz = (MINOR_OPCODE (template->meta_opcode) == 0x6 - && ((template->meta_opcode >> 4) & 0x1) != 0); - bfd_boolean is_o3o = (template->meta_opcode & 0x1) != 0; - bfd_boolean is_mac = 0; - bfd_boolean is_maw = 0; + bool is_muz = (MINOR_OPCODE (template->meta_opcode) == 0x6 + && ((template->meta_opcode >> 4) & 0x1) != 0); + bool is_o3o = (template->meta_opcode & 0x1) != 0; + bool is_mac = 0; + bool is_maw = 0; if (!strncasecmp (template->name, "MAW", 3)) is_maw = 1; @@ -4014,7 +4014,7 @@ parse_fget_set_acf (const char *line, metag_insn *insn, const char *l = line; int part; metag_addr addr; - bfd_boolean is_get = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; + bool is_get = MAJOR_OPCODE (template->meta_opcode) == OPC_GET; memset(&addr, 0, sizeof(addr)); addr.reloc_type = BFD_RELOC_UNUSED; @@ -4138,7 +4138,7 @@ parse_dsp_insn_reg (const char *line, const metag_reg **reg) definition. "load" specifies which table to look at. */ static const char * parse_dsp_template_reg (const char *line, const metag_reg **reg, - bfd_boolean load) + bool load) { return __parse_dsp_reg (line, reg, dsp_tmpl_reg_htab[load]); } @@ -4146,7 +4146,7 @@ parse_dsp_template_reg (const char *line, const metag_reg **reg, /* Parse a single DSP register from LINE. */ static const char * parse_dsp_reg (const char *line, const metag_reg **reg, - bfd_boolean tmpl, bfd_boolean load) + bool tmpl, bool load) { if (tmpl) return parse_dsp_template_reg (line, reg, load); @@ -4155,95 +4155,95 @@ parse_dsp_reg (const char *line, const metag_reg **reg, } /* Return TRUE if UNIT is an address unit. */ -static bfd_boolean +static bool is_addr_unit (enum metag_unit unit) { switch (unit) { case UNIT_A0: case UNIT_A1: - return TRUE; + return true; default: - return FALSE; + return false; } } /* Return TRUE if UNIT1 and UNIT2 are equivalent units. */ -static bfd_boolean +static bool is_same_data_unit (enum metag_unit unit1, enum metag_unit unit2) { if (unit1 == unit2) - return TRUE; + return true; switch (unit1) { case UNIT_D0: if (unit2 == UNIT_ACC_D0 || unit2 == UNIT_RAM_D0) - return TRUE; + return true; break; case UNIT_D1: if (unit2 == UNIT_ACC_D1 || unit2 == UNIT_RAM_D1) - return TRUE; + return true; break; case UNIT_ACC_D0: if (unit2 == UNIT_D0 || unit2 == UNIT_RAM_D0) - return TRUE; + return true; break; case UNIT_ACC_D1: if (unit2 == UNIT_D1 || unit2 == UNIT_RAM_D1) - return TRUE; + return true; break; case UNIT_RAM_D0: if (unit2 == UNIT_ACC_D0 || unit2 == UNIT_D0) - return TRUE; + return true; break; case UNIT_RAM_D1: if (unit2 == UNIT_ACC_D1 || unit2 == UNIT_D1) - return TRUE; + return true; break; default: - return FALSE; + return false; } - return FALSE; + return false; } /* Return TRUE if the register NUM is a quickrot control register. */ -static bfd_boolean +static bool is_quickrot_reg (unsigned int num) { switch (num) { case 2: case 3: - return TRUE; + return true; } - return FALSE; + return false; } /* Return TRUE if REG is an accumulator register. */ -static bfd_boolean +static bool is_accumulator_reg (const metag_reg *reg) { if (reg->unit == UNIT_ACC_D0 || reg->unit == UNIT_ACC_D1) - return TRUE; + return true; - return FALSE; + return false; } /* Return TRUE if REG is a DSP RAM register. */ -static bfd_boolean +static bool is_dspram_reg (const metag_reg *reg) { if (reg->unit == UNIT_RAM_D0 || reg->unit == UNIT_RAM_D1) - return TRUE; + return true; - return FALSE; + return false; } static const char * -__parse_gp_reg (const char *line, const metag_reg **reg, bfd_boolean load) +__parse_gp_reg (const char *line, const metag_reg **reg, bool load) { const char *l = line; char reg_buf[MAX_REG_LEN]; @@ -4260,7 +4260,7 @@ __parse_gp_reg (const char *line, const metag_reg **reg, bfd_boolean load) if (l == NULL) return NULL; - l = parse_dsp_reg (l, reg, TRUE, load); + l = parse_dsp_reg (l, reg, true, load); if (l == NULL) return NULL; @@ -4299,8 +4299,8 @@ __parse_gp_reg (const char *line, const metag_reg **reg, bfd_boolean load) a destination operand. */ static const char * parse_dsp_regs_list (const char *line, const metag_reg **regs, size_t count, - size_t *regs_read, bfd_boolean try_gp, bfd_boolean tmpl, - bfd_boolean load, bfd_boolean first_dst) + size_t *regs_read, bool try_gp, bool tmpl, + bool load, bool first_dst) { const char *l = line; int seen_regs = 0; @@ -4370,7 +4370,7 @@ parse_dsp_regs_list (const char *line, const metag_reg **regs, size_t count, - [DSPRam-DSPRam--] */ static const char * parse_dsp_addr (const char *line, metag_addr *addr, unsigned int size, - bfd_boolean load) + bool load) { const char *l = line, *ll; const metag_reg *regs[1]; @@ -4379,7 +4379,7 @@ parse_dsp_addr (const char *line, metag_addr *addr, unsigned int size, /* Skip opening square bracket. */ l++; - l = parse_dsp_regs_list (l, regs, 1, ®s_read, TRUE, TRUE, load, FALSE); + l = parse_dsp_regs_list (l, regs, 1, ®s_read, true, true, load, false); if (l == NULL) return NULL; @@ -4433,7 +4433,7 @@ parse_dsp_addr (const char *line, metag_addr *addr, unsigned int size, if (l == NULL) return NULL; - l = parse_dsp_regs_list (l, regs, 1, ®s_read, TRUE, TRUE, load, FALSE); + l = parse_dsp_regs_list (l, regs, 1, ®s_read, true, true, load, false); if (l == NULL) return NULL; @@ -4475,9 +4475,9 @@ parse_dget_set (const char *line, metag_insn *insn, metag_addr addr; int unit = 0; int rd_reg = 0; - bfd_boolean is_get = (template->meta_opcode & 0x100) != 0; - bfd_boolean is_dual = (template->meta_opcode & 0x4) != 0; - bfd_boolean is_template = FALSE; + bool is_get = (template->meta_opcode & 0x100) != 0; + bool is_dual = (template->meta_opcode & 0x4) != 0; + bool is_template = false; const metag_reg *regs[2]; unsigned int size; size_t count, regs_read; @@ -4494,8 +4494,8 @@ parse_dget_set (const char *line, metag_insn *insn, if (*l == 'T') count = 1; - l = parse_dsp_regs_list (l, regs, count, ®s_read, FALSE, - FALSE, FALSE, FALSE); + l = parse_dsp_regs_list (l, regs, count, ®s_read, false, + false, false, false); l = skip_comma (l); if (l == NULL) @@ -4519,8 +4519,8 @@ parse_dget_set (const char *line, metag_insn *insn, if (*l == 'T') count = 1; - l = parse_dsp_regs_list (l, regs, count, ®s_read, FALSE, FALSE, - FALSE, FALSE); + l = parse_dsp_regs_list (l, regs, count, ®s_read, false, false, + false, false); } if (l == NULL) @@ -4528,7 +4528,7 @@ parse_dget_set (const char *line, metag_insn *insn, /* The first register dictates the unit. */ if (regs[0]->unit == UNIT_DT) - is_template = TRUE; + is_template = true; else { if (regs[0]->unit == UNIT_D0 || regs[0]->unit == UNIT_RAM_D0 || @@ -4619,7 +4619,7 @@ parse_dtemplate (const char *line, metag_insn *insn, { const char *l = line; const metag_reg *regs[TEMPLATE_NUM_REGS]; - bfd_boolean daop_only = FALSE; + bool daop_only = false; int regs_val[4]; int regs_which[4] = { -1, -1, -1, -1}; /* Register or immediate? */ int i; @@ -4635,7 +4635,7 @@ parse_dtemplate (const char *line, metag_insn *insn, /* We may only have 3 register operands. */ if (*l == END_OF_INSN && i == 3) { - daop_only = TRUE; + daop_only = true; break; } @@ -4662,11 +4662,11 @@ parse_dtemplate (const char *line, metag_insn *insn, this is a load or store. So we have to try looking up the register name in both the load and store tables. */ const char *l2 = l; - l = __parse_gp_reg (l, ®s[i], TRUE); + l = __parse_gp_reg (l, ®s[i], true); if (l == NULL) { /* Try the store table too. */ - l = __parse_gp_reg (l2, ®s[i], FALSE); + l = __parse_gp_reg (l2, ®s[i], false); if (l == NULL) { /* Then try a DSP register. */ @@ -4720,7 +4720,7 @@ parse_dtemplate (const char *line, metag_insn *insn, template definition is a DSP RAM template definition. */ static const char * template_mem_ref(const char *line, metag_addr *addr, - bfd_boolean *dspram, int size, bfd_boolean load) + bool *dspram, int size, bool load) { const char *l = line; @@ -4729,9 +4729,9 @@ template_mem_ref(const char *line, metag_addr *addr, if (l != NULL) { if (is_addr_unit(addr->base_reg->unit)) - *dspram = FALSE; + *dspram = false; else - *dspram = TRUE; + *dspram = true; } return l; @@ -4740,10 +4740,10 @@ template_mem_ref(const char *line, metag_addr *addr, /* Sets LOAD to TRUE if this is a Template load definition (otherwise it's a store). Fills out ADDR, TEMPLATE_REG and ADDR_UNIT. */ static const char * -parse_template_regs (const char *line, bfd_boolean *load, +parse_template_regs (const char *line, bool *load, unsigned int *addr_unit, const metag_reg **template_reg, metag_addr *addr, - bfd_boolean *dspram, int size) + bool *dspram, int size) { const char *l = line; @@ -4753,8 +4753,8 @@ parse_template_regs (const char *line, bfd_boolean *load, /* DSP Template load definition (Tx, [Ax]) */ if (*l == 'T') { - *load = TRUE; - l = parse_dsp_reg (l, &template_reg[0], FALSE, FALSE); + *load = true; + l = parse_dsp_reg (l, &template_reg[0], false, false); if (l == NULL) return NULL; @@ -4768,14 +4768,14 @@ parse_template_regs (const char *line, bfd_boolean *load, } else if (*l == ADDR_BEGIN_CHAR) /* DSP Template store ([Ax], Tx) */ { - *load = FALSE; + *load = false; l = template_mem_ref (l, addr, dspram, size, *load); l = skip_comma(l); if (l == NULL) return NULL; - l = parse_dsp_reg (l, &template_reg[0], FALSE, FALSE); + l = parse_dsp_reg (l, &template_reg[0], false, false); if (l == NULL) return NULL; @@ -4799,7 +4799,7 @@ static metag_reg _reg; static const char * interpret_template_regs(const char *line, metag_insn *insn, const metag_reg **regs, - int *regs_shift, bfd_boolean *load, bfd_boolean *dspram, + int *regs_shift, bool *load, bool *dspram, int size, int *ls_shift, int *au_shift, unsigned int *au, int *imm, int *imm_shift, unsigned int *imm_mask) @@ -4888,16 +4888,16 @@ interpret_template_regs(const char *line, metag_insn *insn, } /* Does this combination of units need the O2R bit and can it be encoded? */ -static bfd_boolean +static bool units_need_o2r (enum metag_unit unit1, enum metag_unit unit2) { if (unit1 == unit2) - return FALSE; + return false; if (unit1 == UNIT_D0 || unit1 == UNIT_ACC_D0 || unit1 == UNIT_RAM_D0) { if (unit2 == UNIT_ACC_D0 || unit2 == UNIT_RAM_D0 || unit2 == UNIT_D0) - return FALSE; + return false; switch (unit2) { @@ -4905,16 +4905,16 @@ units_need_o2r (enum metag_unit unit1, enum metag_unit unit2) case UNIT_D1: case UNIT_RD: case UNIT_A0: - return TRUE; + return true; default: - return FALSE; + return false; } } if (unit1 == UNIT_D1 || unit1 == UNIT_ACC_D1 || unit1 == UNIT_RAM_D1) { if (unit2 == UNIT_ACC_D1 || unit2 == UNIT_RAM_D1 || unit2 == UNIT_D1) - return FALSE; + return false; switch (unit2) { @@ -4922,17 +4922,17 @@ units_need_o2r (enum metag_unit unit1, enum metag_unit unit2) case UNIT_D0: case UNIT_RD: case UNIT_A0: - return TRUE; + return true; default: - return FALSE; + return false; } } - return FALSE; + return false; } /* Return TRUE if this is a DSP data unit. */ -static bfd_boolean +static bool is_dsp_data_unit (const metag_reg *reg) { switch (reg->unit) @@ -4943,9 +4943,9 @@ is_dsp_data_unit (const metag_reg *reg) case UNIT_ACC_D1: case UNIT_RAM_D0: case UNIT_RAM_D1: - return TRUE; + return true; default: - return FALSE; + return false; } } @@ -4961,15 +4961,15 @@ parse_dalu (const char *line, metag_insn *insn, const metag_reg *regs[4]; metag_addr addr; size_t regs_read; - bfd_boolean is_mov = MAJOR_OPCODE (template->meta_opcode) == OPC_ADD; - bfd_boolean is_cmp = ((MAJOR_OPCODE (template->meta_opcode) == OPC_CMP) && - ((template->meta_opcode & 0xee) == 0)); - bfd_boolean is_dual = insn->dsp_width == DSP_WIDTH_DUAL; - bfd_boolean is_quickrot64 = ((insn->dsp_action_flags & DSP_ACTION_QR64) != 0); + bool is_mov = MAJOR_OPCODE (template->meta_opcode) == OPC_ADD; + bool is_cmp = (MAJOR_OPCODE (template->meta_opcode) == OPC_CMP + && (template->meta_opcode & 0xee) == 0); + bool is_dual = insn->dsp_width == DSP_WIDTH_DUAL; + bool is_quickrot64 = (insn->dsp_action_flags & DSP_ACTION_QR64) != 0; int l1_shift = INVALID_SHIFT; - bfd_boolean load = FALSE; + bool load = false; int ls_shift = INVALID_SHIFT; - bfd_boolean ar = FALSE; + bool ar = false; int ar_shift = INVALID_SHIFT; int regs_shift[3] = { INVALID_SHIFT, INVALID_SHIFT, INVALID_SHIFT }; int imm = 0; @@ -5002,8 +5002,8 @@ parse_dalu (const char *line, metag_insn *insn, (insn->dsp_daoppame_flags & DSP_DAOPPAME_16) != 0); int mx_shift = INVALID_SHIFT; int size = is_dual ? 8 : 4; - bfd_boolean dspram; - bfd_boolean conditional = (MINOR_OPCODE (template->meta_opcode) & 0x4) != 0; + bool dspram; + bool conditional = (MINOR_OPCODE (template->meta_opcode) & 0x4) != 0; /* XFIXME: check the flags are valid with the instruction. */ if (is_quickrot64 && !(template->arg_type & DSP_ARGS_QR)) @@ -5056,8 +5056,8 @@ parse_dalu (const char *line, metag_insn *insn, e.g. ACe.e,ACx.r,ACo.e */ if (template->arg_type & DSP_ARGS_XACC) { - ll = parse_dsp_regs_list (l, regs, 3, ®s_read, FALSE, FALSE, - FALSE, FALSE); + ll = parse_dsp_regs_list (l, regs, 3, ®s_read, false, false, + false, false); if (ll != NULL && regs_read == 3 && is_accumulator_reg (regs[0])) { @@ -5098,7 +5098,7 @@ parse_dalu (const char *line, metag_insn *insn, a1_shift = 2; om_shift = 3; - ll = parse_dsp_reg (l, ®s[0], FALSE, FALSE); + ll = parse_dsp_reg (l, ®s[0], false, false); if (ll != NULL) { /* Using ACe.r as the dst requires one of the P,N or Z @@ -5113,7 +5113,7 @@ parse_dalu (const char *line, metag_insn *insn, l = ll; l = skip_comma (l); l = parse_dsp_regs_list (l, ®s[1], 2, ®s_read, - TRUE, FALSE, FALSE, FALSE); + true, false, false, false); if (l == NULL || regs_read != 2) { as_bad (_("invalid register")); @@ -5142,7 +5142,7 @@ parse_dalu (const char *line, metag_insn *insn, regs_shift[0] = 19; - l = parse_dsp_regs_list (l, regs, 2, ®s_read, TRUE, FALSE, FALSE, TRUE); + l = parse_dsp_regs_list (l, regs, 2, ®s_read, true, false, false, true); if (l == NULL || regs_read != 2) return NULL; @@ -5202,7 +5202,7 @@ parse_dalu (const char *line, metag_insn *insn, regs_shift[2] = 9; /* Is Rs2 an accumulator reg, e.g. De.r,Dx.r,De.r|ACe.r */ - ll = parse_dsp_reg (l, ®s[2], FALSE, FALSE); + ll = parse_dsp_reg (l, ®s[2], false, false); if (ll != NULL) { l = ll; @@ -5215,12 +5215,12 @@ parse_dalu (const char *line, metag_insn *insn, om_shift = 3; ar_shift = 7; - ar = TRUE; + ar = true; } else { /* De.r,Dx.r,De.r */ - l = __parse_gp_reg (l, ®s[2], TRUE); + l = __parse_gp_reg (l, ®s[2], true); if (l == NULL) return NULL; } @@ -5247,7 +5247,7 @@ parse_dalu (const char *line, metag_insn *insn, return NULL; } - l = __parse_gp_reg (l, ®s[3], TRUE); + l = __parse_gp_reg (l, ®s[3], true); if (l == NULL) { as_bad (_("invalid fourth register")); @@ -5309,10 +5309,10 @@ parse_dalu (const char *line, metag_insn *insn, /* Group 2. */ if (template->arg_type & DSP_ARGS_2) { - bfd_boolean is_xsd = (MAJOR_OPCODE (template->meta_opcode) == OPC_MISC - && MINOR_OPCODE (template->meta_opcode) == 0xa); - bfd_boolean is_fpu_mov = template->insn_type == INSN_DSP_FPU; - bfd_boolean to_fpu = ((template->meta_opcode >> 7) & 0x1) != 0; + bool is_xsd = (MAJOR_OPCODE (template->meta_opcode) == OPC_MISC + && MINOR_OPCODE (template->meta_opcode) == 0xa); + bool is_fpu_mov = template->insn_type == INSN_DSP_FPU; + bool to_fpu = ((template->meta_opcode >> 7) & 0x1) != 0; if (is_xsd) du_shift = 0; @@ -5328,7 +5328,7 @@ parse_dalu (const char *line, metag_insn *insn, /* DSPe.r,Dx.r or DSPx.r,#I16 */ if (template->arg_type & DSP_ARGS_DSP_SRC1) { - l = parse_dsp_reg (l, regs, FALSE, FALSE); + l = parse_dsp_reg (l, regs, false, false); if (l == NULL) { as_bad (_("invalid register operand #1")); @@ -5421,12 +5421,12 @@ parse_dalu (const char *line, metag_insn *insn, l1_shift = 4; } - ll = __parse_gp_reg (l, ®s[1], TRUE); + ll = __parse_gp_reg (l, ®s[1], true); if (ll == NULL) { if (template->arg_type & DSP_ARGS_DSP_SRC2) { - l = parse_dsp_reg (l, ®s[1], FALSE, FALSE); + l = parse_dsp_reg (l, ®s[1], false, false); if (l == NULL) { as_bad (_("invalid register operand #3")); @@ -5522,7 +5522,7 @@ parse_dalu (const char *line, metag_insn *insn, du_shift = 24; l1_shift = 4; - l = __parse_gp_reg (l, regs, FALSE); + l = __parse_gp_reg (l, regs, false); if (l == NULL) { as_bad (_("invalid register operand")); @@ -5533,7 +5533,7 @@ parse_dalu (const char *line, metag_insn *insn, if (*l == 'A') { - l = parse_dsp_reg (l, ®s[1], FALSE, FALSE); + l = parse_dsp_reg (l, ®s[1], false, false); if (l == NULL) { as_bad (_("invalid accumulator register")); @@ -5544,7 +5544,7 @@ parse_dalu (const char *line, metag_insn *insn, } else { - l = __parse_gp_reg (l, ®s[1], TRUE); + l = __parse_gp_reg (l, ®s[1], true); if (l == NULL) { as_bad (_("invalid register operand")); @@ -5581,7 +5581,7 @@ parse_dalu (const char *line, metag_insn *insn, else { regs_shift[2] = 9; - l = __parse_gp_reg (l, ®s[2], TRUE); + l = __parse_gp_reg (l, ®s[2], true); if (l == NULL) return NULL; } @@ -5819,7 +5819,7 @@ static const struct metag_core_option metag_dsps[] = }; /* Parse a CPU command line option. */ -static bfd_boolean +static bool metag_parse_cpu (const char * str) { const struct metag_core_option * opt; @@ -5845,7 +5845,7 @@ metag_parse_cpu (const char * str) } /* Parse an FPU command line option. */ -static bfd_boolean +static bool metag_parse_fpu (const char * str) { const struct metag_core_option * opt; @@ -5871,7 +5871,7 @@ metag_parse_fpu (const char * str) } /* Parse a DSP command line option. */ -static bfd_boolean +static bool metag_parse_dsp (const char * str) { const struct metag_core_option * opt; @@ -5900,7 +5900,7 @@ struct metag_long_option { const char *option; /* Substring to match. */ const char *help; /* Help information. */ - bfd_boolean (*func) (const char *subopt); /* Function to decode sub-option. */ + bool (*func) (const char *subopt); /* Function to decode sub-option. */ const char *deprecated; /* If non-null, print this message. */ }; @@ -6491,7 +6491,7 @@ create_scond_htab (void) } /* Entry point for instruction parsing. */ -static bfd_boolean +static bool parse_insn (const char *line, metag_insn *insn) { char mnemonic[MAX_MNEMONIC_LEN]; @@ -6510,7 +6510,7 @@ parse_insn (const char *line, metag_insn *insn) if (mnemonic_len >= MAX_MNEMONIC_LEN) { as_bad (_("instruction mnemonic too long: %s"), line); - return FALSE; + return false; } strncpy(mnemonic, line, mnemonic_len); @@ -6566,7 +6566,7 @@ parse_insn (const char *line, metag_insn *insn) if (*end != END_OF_INSN) as_bad (_("junk at end of line: \"%s\""), line); else - return TRUE; + return true; } } } @@ -6580,7 +6580,7 @@ parse_insn (const char *line, metag_insn *insn) else as_bad (_("unknown mnemonic: \"%s\""), mnemonic); } - return FALSE; + return false; } static void @@ -6773,7 +6773,7 @@ metag_force_relocation (fixS * fix) return generic_force_reloc (fix); } -bfd_boolean +bool metag_fix_adjustable (fixS * fixP) { if (fixP->fx_addsy == NULL) @@ -7063,7 +7063,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) case BFD_RELOC_METAG_LOADDR16: case BFD_RELOC_VTABLE_INHERIT: case BFD_RELOC_VTABLE_ENTRY: - fixP->fx_done = FALSE; + fixP->fx_done = false; break; case BFD_RELOC_METAG_REL8: @@ -7132,5 +7132,5 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) } if (fixP->fx_addsy == NULL) - fixP->fx_done = TRUE; + fixP->fx_done = true; } |