diff options
| -rw-r--r-- | bfd/ChangeLog | 25 | ||||
| -rw-r--r-- | bfd/aoutx.h | 4 | ||||
| -rw-r--r-- | bfd/archures.c | 3 | ||||
| -rw-r--r-- | bfd/bfd-in2.h | 3 | ||||
| -rw-r--r-- | bfd/cpu-mips.c | 45 | ||||
| -rw-r--r-- | bfd/elf32-mips.c | 31 | ||||
| -rw-r--r-- | bfd/po/POTFILES.in | 1 | ||||
| -rw-r--r-- | bfd/po/bfd.pot | 139 | ||||
| -rw-r--r-- | binutils/ChangeLog | 6 | ||||
| -rw-r--r-- | binutils/po/binutils.pot | 662 | ||||
| -rw-r--r-- | binutils/readelf.c | 6 | ||||
| -rwxr-xr-x | config.sub | 14 | ||||
| -rw-r--r-- | gas/ChangeLog | 39 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 673 | ||||
| -rw-r--r-- | gas/doc/as.texinfo | 15 | ||||
| -rw-r--r-- | gas/doc/c-mips.texi | 18 | ||||
| -rw-r--r-- | gas/po/gas.pot | 285 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips32.d | 49 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips32.s | 63 | ||||
| -rw-r--r-- | include/elf/ChangeLog | 6 | ||||
| -rw-r--r-- | include/elf/mips.h | 7 | ||||
| -rw-r--r-- | include/opcode/ChangeLog | 17 | ||||
| -rw-r--r-- | include/opcode/mips.h | 501 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/mips-dis.c | 48 | ||||
| -rw-r--r-- | opcodes/mips-opc.c | 67 | ||||
| -rw-r--r-- | opcodes/po/opcodes.pot | 27 |
28 files changed, 1475 insertions, 1288 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 059827abea2..4c5b4cf191c 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,28 @@ +2000-12-01 Chris Demetriou <cgd@sibyte.com> + + * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mips32 and + bfd_mach_mips32_4k. Update FIXME comment. + * archures.c (bfd_mach_mips32): New constant. + (bfd_mach_mips4K, bfd_mach_mips32_4k) Rename the former to + the latter, renumber it. + * bfd-in2.h (bfd_mach_mips32): New constant. + (bfd_mach_mips4K, bfd_mach_mips32_4k) Rename the former to + the latter, renumber it. + * cpu-mips.c (I_mips32): New constant. + (I_mips4K, I_mips32_4k): Rename the former to the latter. + (arch_info_struct): Add bfd_mach_mips32 entry, replace + bfd_mach_mips4K entry with bfd_mach_mips32_4k entry. + * elf32-mips.c (elf_mips_isa): Add E_MIPS_ARCH_32 case. + (elf_mips_mach): Likewise. Also, replace E_MIPS_MACH_MIPS32 + with E_MIPS_MACH_MIPS32_4K. + (_bfd_mips_elf_final_write_processing): Replace + bfd_mach_mips4K with bfd_mach_mips32_4k case, add + bfd_mach_mips32 case. + (_bfd_mips_elf_merge_private_bfd_data): Generalize ISA mixing + comparison with support for MIPS32. + (_bfd_mips_elf_print_private_bfd_data): Print ISA name for + MIPS32. + 2000-12-01 Joel Sherrill <joel@OARcorp.com> * config.bfd (arm-*-rtems*, a29k-*rtems*): New targets. diff --git a/bfd/aoutx.h b/bfd/aoutx.h index a050b8bba5f..388e8d72566 100644 --- a/bfd/aoutx.h +++ b/bfd/aoutx.h @@ -776,7 +776,9 @@ NAME(aout,machine_type) (arch, machine, unknown) case bfd_mach_mips8000: case bfd_mach_mips10000: case bfd_mach_mips16: - /* FIXME: These should be MIPS3 or MIPS4. */ + case bfd_mach_mips32: + case bfd_mach_mips32_4k: + /* FIXME: These should be MIPS3, MIPS4, MIPS16, MIPS32, etc. */ arch_flags = M_MIPS2; break; default: diff --git a/bfd/archures.c b/bfd/archures.c index 27a41b3cd4e..5bb4ff7b1db 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -130,8 +130,9 @@ DESCRIPTION .#define bfd_mach_mips6000 6000 .#define bfd_mach_mips8000 8000 .#define bfd_mach_mips10000 10000 -.#define bfd_mach_mips4K 32 .#define bfd_mach_mips16 16 +.#define bfd_mach_mips32 32 +.#define bfd_mach_mips32_4k 3204113 {* 32, 04, octal 'K' *} . bfd_arch_i386, {* Intel 386 *} .#define bfd_mach_i386_i386 0 .#define bfd_mach_i386_i8086 1 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 8120e24c4bb..0280f12a904 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1398,8 +1398,9 @@ enum bfd_architecture #define bfd_mach_mips6000 6000 #define bfd_mach_mips8000 8000 #define bfd_mach_mips10000 10000 -#define bfd_mach_mips4K 32 #define bfd_mach_mips16 16 +#define bfd_mach_mips32 32 +#define bfd_mach_mips32_4k 3204113 /* 32, 04, octal 'K' */ bfd_arch_i386, /* Intel 386 */ #define bfd_mach_i386_i386 0 #define bfd_mach_i386_i8086 1 diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c index e15af2e4aa2..0ac23cb644f 100644 --- a/bfd/cpu-mips.c +++ b/bfd/cpu-mips.c @@ -38,26 +38,28 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ NEXT, \ } -enum { -I_mips3000, -I_mips3900, -I_mips4000, -I_mips4010, -I_mips4100, -I_mips4111, -I_mips4300, -I_mips4400, -I_mips4600, -I_mips4650, -I_mips5000, -I_mips6000, -I_mips8000, -I_mips10000, -I_mips4K, -I_mips16 +enum +{ + I_mips3000, + I_mips3900, + I_mips4000, + I_mips4010, + I_mips4100, + I_mips4111, + I_mips4300, + I_mips4400, + I_mips4600, + I_mips4650, + I_mips5000, + I_mips6000, + I_mips8000, + I_mips10000, + I_mips16, + I_mips32, + I_mips32_4k, }; -#define NN(index) (&arch_info_struct[(index)+1]) +#define NN(index) (&arch_info_struct[(index) + 1]) static const bfd_arch_info_type arch_info_struct[] = { @@ -74,9 +76,10 @@ static const bfd_arch_info_type arch_info_struct[] = N (64, 64, bfd_mach_mips5000, "mips:5000", false, NN(I_mips5000)), N (32, 32, bfd_mach_mips6000, "mips:6000", false, NN(I_mips6000)), N (64, 64, bfd_mach_mips8000, "mips:8000", false, NN(I_mips8000)), - N (64, 64, bfd_mach_mips10000, "mips:10000", false, NN(I_mips10000)), - N (32, 32, bfd_mach_mips4K, "mips:4K", false, NN(I_mips4K)), - N (64, 64, bfd_mach_mips16, "mips:16", false, 0), + N (64, 64, bfd_mach_mips10000,"mips:10000",false, NN(I_mips10000)), + N (64, 64, bfd_mach_mips16, "mips:16", false, NN(I_mips16)), + N (32, 32, bfd_mach_mips32, "mips:mips32", false, NN(I_mips32)), + N (32, 32, bfd_mach_mips32_4k,"mips:mips32-4k", false, 0), }; /* The default architecture is mips:3000, but with a machine number of diff --git a/bfd/elf32-mips.c b/bfd/elf32-mips.c index b9b99c76b2e..b58eddf5c9c 100644 --- a/bfd/elf32-mips.c +++ b/bfd/elf32-mips.c @@ -1810,6 +1810,8 @@ elf_mips_isa (flags) return 3; case E_MIPS_ARCH_4: return 4; + case E_MIPS_ARCH_32: + return 32; } return 4; } @@ -1837,8 +1839,8 @@ elf_mips_mach (flags) case E_MIPS_MACH_4650: return bfd_mach_mips4650; - case E_MIPS_MACH_MIPS32: - return bfd_mach_mips4K; + case E_MIPS_MACH_MIPS32_4K: + return bfd_mach_mips32_4k; default: switch (flags & EF_MIPS_ARCH) @@ -1859,6 +1861,10 @@ elf_mips_mach (flags) case E_MIPS_ARCH_4: return bfd_mach_mips8000; break; + + case E_MIPS_ARCH_32: + return bfd_mach_mips32; + break; } } @@ -2336,8 +2342,12 @@ _bfd_mips_elf_final_write_processing (abfd, linker) val = E_MIPS_ARCH_4; break; - case bfd_mach_mips4K: - val = E_MIPS_ARCH_2 | E_MIPS_MACH_MIPS32; + case bfd_mach_mips32: + val = E_MIPS_ARCH_32; + break; + + case bfd_mach_mips32_4k: + val = E_MIPS_ARCH_32 | E_MIPS_MACH_MIPS32_4K; break; } @@ -2537,13 +2547,12 @@ _bfd_mips_elf_merge_private_bfd_data (ibfd, obfd) || new_mach == old_mach ) { - /* Don't warn about mixing -mips1 and -mips2 code, or mixing -mips3 - and -mips4 code. They will normally use the same data sizes and - calling conventions. */ + /* Don't warn about mixing code using 32-bit ISAs, or mixing code + using 64-bit ISAs. They will normally use the same data sizes + and calling conventions. */ - if ((new_isa == 1 || new_isa == 2) - ? (old_isa != 1 && old_isa != 2) - : (old_isa == 1 || old_isa == 2)) + if (( (new_isa == 1 || new_isa == 2 || new_isa == 32) + ^ (old_isa == 1 || old_isa == 2 || old_isa == 32)) != 0) { (*_bfd_error_handler) (_("%s: ISA mismatch (-mips%d) with previous modules (-mips%d)"), @@ -2647,6 +2656,8 @@ _bfd_mips_elf_print_private_bfd_data (abfd, ptr) fprintf (file, _(" [mips3]")); else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_4) fprintf (file, _(" [mips4]")); + else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32) + fprintf (file, _ (" [mips32]")); else fprintf (file, _(" [unknown ISA]")); diff --git a/bfd/po/POTFILES.in b/bfd/po/POTFILES.in index 313422570b8..f75b4caec89 100644 --- a/bfd/po/POTFILES.in +++ b/bfd/po/POTFILES.in @@ -136,7 +136,6 @@ elf64.c elf64-gen.c elf64-hppa.c elf64-hppa.h -elf64-ia64.c elf64-mips.c elf64-sparc.c elf64-x86-64.c diff --git a/bfd/po/bfd.pot b/bfd/po/bfd.pot index 9f84596713e..2534d9719f9 100644 --- a/bfd/po/bfd.pot +++ b/bfd/po/bfd.pot @@ -6,7 +6,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" -"POT-Creation-Date: 2000-11-30 11:08-0800\n" +"POT-Creation-Date: 2000-12-01 13:12-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -34,22 +34,22 @@ msgstr "" msgid "%s: Bad relocation record imported: %d" msgstr "" -#: aoutx.h:1254 aoutx.h:1668 +#: aoutx.h:1256 aoutx.h:1670 #, c-format msgid "%s: can not represent section `%s' in a.out object file format" msgstr "" -#: aoutx.h:1638 +#: aoutx.h:1640 #, c-format msgid "" "%s: can not represent section for symbol `%s' in a.out object file format" msgstr "" -#: aoutx.h:1640 +#: aoutx.h:1642 msgid "*unknown*" msgstr "" -#: aoutx.h:3679 +#: aoutx.h:3681 #, c-format msgid "%s: relocateable link from %s to %s not supported" msgstr "" @@ -660,7 +660,7 @@ msgstr "" #. Ignore init flag - it may not be set, despite the flags field #. containing valid data. -#: elf32-arm.h:2195 elf32-cris.c:615 elf32-m68k.c:430 elf32-mips.c:2623 +#: elf32-arm.h:2195 elf32-cris.c:615 elf32-m68k.c:430 elf32-mips.c:2632 #, c-format msgid "private flags = %lx:" msgstr "" @@ -803,7 +803,7 @@ msgstr "" msgid "SDA relocation when _SDA_BASE_ not defined" msgstr "" -#: elf32-m32r.c:1000 elf32-ppc.c:2973 elf64-ia64.c:3256 +#: elf32-m32r.c:1000 elf32-ppc.c:2973 #, c-format msgid "%s: unknown relocation type %d" msgstr "" @@ -854,120 +854,124 @@ msgstr "" msgid "Linking mips16 objects into %s format is not supported" msgstr "" -#: elf32-mips.c:2509 +#: elf32-mips.c:2519 #, c-format msgid "%s: linking PIC files with non-PIC files" msgstr "" -#: elf32-mips.c:2519 +#: elf32-mips.c:2529 #, c-format msgid "%s: linking abicalls files with non-abicalls files" msgstr "" -#: elf32-mips.c:2549 +#: elf32-mips.c:2558 #, c-format msgid "%s: ISA mismatch (-mips%d) with previous modules (-mips%d)" msgstr "" -#: elf32-mips.c:2558 +#: elf32-mips.c:2567 #, c-format msgid "%s: ISA mismatch (%d) with previous modules (%d)" msgstr "" -#: elf32-mips.c:2581 +#: elf32-mips.c:2590 #, c-format msgid "%s: ABI mismatch: linking %s module with previous %s modules" msgstr "" -#: elf32-mips.c:2595 elf32-ppc.c:1481 elf64-sparc.c:2974 +#: elf32-mips.c:2604 elf32-ppc.c:1481 elf64-sparc.c:2974 #, c-format msgid "%s: uses different e_flags (0x%lx) fields than previous modules (0x%lx)" msgstr "" -#: elf32-mips.c:2626 +#: elf32-mips.c:2635 msgid " [abi=O32]" msgstr "" -#: elf32-mips.c:2628 +#: elf32-mips.c:2637 msgid " [abi=O64]" msgstr "" -#: elf32-mips.c:2630 +#: elf32-mips.c:2639 msgid " [abi=EABI32]" msgstr "" -#: elf32-mips.c:2632 +#: elf32-mips.c:2641 msgid " [abi=EABI64]" msgstr "" -#: elf32-mips.c:2634 +#: elf32-mips.c:2643 msgid " [abi unknown]" msgstr "" -#: elf32-mips.c:2636 +#: elf32-mips.c:2645 msgid " [abi=N32]" msgstr "" -#: elf32-mips.c:2638 +#: elf32-mips.c:2647 msgid " [abi=64]" msgstr "" -#: elf32-mips.c:2640 +#: elf32-mips.c:2649 msgid " [no abi set]" msgstr "" -#: elf32-mips.c:2643 +#: elf32-mips.c:2652 msgid " [mips1]" msgstr "" -#: elf32-mips.c:2645 +#: elf32-mips.c:2654 msgid " [mips2]" msgstr "" -#: elf32-mips.c:2647 +#: elf32-mips.c:2656 msgid " [mips3]" msgstr "" -#: elf32-mips.c:2649 +#: elf32-mips.c:2658 msgid " [mips4]" msgstr "" -#: elf32-mips.c:2651 +#: elf32-mips.c:2660 +msgid " [mips32]" +msgstr "" + +#: elf32-mips.c:2662 msgid " [unknown ISA]" msgstr "" -#: elf32-mips.c:2654 +#: elf32-mips.c:2665 msgid " [32bitmode]" msgstr "" -#: elf32-mips.c:2656 +#: elf32-mips.c:2667 msgid " [not 32bitmode]" msgstr "" -#: elf32-mips.c:4305 +#: elf32-mips.c:4316 msgid "static procedure (no name)" msgstr "" -#: elf32-mips.c:4920 elf64-alpha.c:4378 +#: elf32-mips.c:4931 elf64-alpha.c:4378 #, c-format msgid "%s: illegal section name `%s'" msgstr "" -#: elf32-mips.c:5484 +#: elf32-mips.c:5495 msgid "not enough GOT space for local GOT entries" msgstr "" -#: elf32-mips.c:6601 +#: elf32-mips.c:6612 #, c-format msgid "%s: %s+0x%lx: jump to stub routine which is not jal" msgstr "" -#: elf32-mips.c:7588 +#: elf32-mips.c:7599 #, c-format msgid "Malformed reloc detected for section %s" msgstr "" -#: elf32-mips.c:7665 +#: elf32-mips.c:7676 #, c-format msgid "%s: CALL16 reloc at 0x%lx not against global symbol" msgstr "" @@ -1141,73 +1145,6 @@ msgstr "" msgid "%s: .got subsegment exceeds 64K (size %d)" msgstr "" -#: elf64-ia64.c:1839 -msgid "@pltoff reloc against local symbol" -msgstr "" - -#: elf64-ia64.c:1886 -msgid "non-zero addend in @fptr reloc" -msgstr "" - -#: elf64-ia64.c:3103 -#, c-format -msgid "%s: short data segment overflowed (0x%lx >= 0x400000)" -msgstr "" - -#: elf64-ia64.c:3114 -#, c-format -msgid "%s: __gp does not cover short data segment" -msgstr "" - -#: elf64-ia64.c:3407 -#, c-format -msgid "%s: linking non-pic code in a shared library" -msgstr "" - -#: elf64-ia64.c:3437 -#, c-format -msgid "%s: @gprel relocation against dynamic symbol %s" -msgstr "" - -#: elf64-ia64.c:3573 -#, c-format -msgid "%s: dynamic relocation against speculation fixup" -msgstr "" - -#: elf64-ia64.c:3581 -#, c-format -msgid "%s: speculation fixup against undefined weak symbol" -msgstr "" - -#: elf64-ia64.c:3738 -msgid "unsupported reloc" -msgstr "" - -#: elf64-ia64.c:4056 -#, c-format -msgid "%s: linking trap-on-NULL-dereference with non-trapping files" -msgstr "" - -#: elf64-ia64.c:4065 -#, c-format -msgid "%s: linking big-endian files with little-endian files" -msgstr "" - -#: elf64-ia64.c:4074 -#, c-format -msgid "%s: linking 64-bit files with 32-bit files" -msgstr "" - -#: elf64-ia64.c:4083 -#, c-format -msgid "%s: linking constant-gp files with non-constant-gp files" -msgstr "" - -#: elf64-ia64.c:4093 -#, c-format -msgid "%s: linking auto-pic files with non-auto-pic files" -msgstr "" - #: elf64-sparc.c:1250 #, c-format msgid "%s: check_relocs: unhandled reloc type %d" diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 8ec5ee39d17..c12ee4c9b42 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,9 @@ +2000-12-01 Chris Demetriou <cgd@sibyte.com> + + * readelf.c (get_machine_flags): Recognize MIPS32 ISA in + EF_MIPS_ARCH. Replace use of E_MIPS_MACH_MIPS32 with + E_MIPS_MACH_MIPS32_4K and adjust printed CPU name similarly. + 2000-11-30 Richard Earnshaw <rearnsha@arm.com> * readelf.c (frame_display_row): Output 's' for DW_CFA_same_value. diff --git a/binutils/po/binutils.pot b/binutils/po/binutils.pot index fcf0b1898fd..9664d25717b 100644 --- a/binutils/po/binutils.pot +++ b/binutils/po/binutils.pot @@ -6,7 +6,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" -"POT-Creation-Date: 2000-11-02 17:45-0800\n" +"POT-Creation-Date: 2000-12-01 13:19-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -23,7 +23,7 @@ msgid "" msgstr "" #: addr2line.c:83 ar.c:288 nlmconv.c:1119 objcopy.c:373 objcopy.c:405 -#: readelf.c:1847 size.c:91 strings.c:530 windres.c:737 +#: readelf.c:1862 size.c:91 strings.c:530 windres.c:737 #, c-format msgid "Report bugs to %s\n" msgstr "" @@ -1996,955 +1996,984 @@ msgstr "" msgid "Last stabs entries before error:\n" msgstr "" -#: readelf.c:301 readelf.c:327 +#: readelf.c:259 +#, c-format +msgid "Unable to seek to start of %s at %x\n" +msgstr "" + +#: readelf.c:267 +#, c-format +msgid "Out of memory allocating %d bytes for %s\n" +msgstr "" + +#: readelf.c:273 +#, c-format +msgid "Unable to read in %d bytes of %s\n" +msgstr "" + +#: readelf.c:283 +#, c-format +msgid "Unable to seek to %x for %s\n" +msgstr "" + +#: readelf.c:288 +#, c-format +msgid "Unable to read data at %x for %s\n" +msgstr "" + +#: readelf.c:303 readelf.c:329 #, c-format msgid "%s: Error: " msgstr "" -#: readelf.c:313 readelf.c:342 +#: readelf.c:315 readelf.c:344 #, c-format msgid "%s: Warning: " msgstr "" -#: readelf.c:392 readelf.c:530 +#: readelf.c:394 readelf.c:532 #, c-format msgid "Unhandled data length: %d\n" msgstr "" -#: readelf.c:593 +#: readelf.c:595 msgid "Don't know about relocations on this machine architecture\n" msgstr "" -#: readelf.c:633 readelf.c:662 readelf.c:694 readelf.c:722 +#: readelf.c:635 readelf.c:664 readelf.c:696 readelf.c:724 msgid "out of memory parsing relocs" msgstr "" -#: readelf.c:740 +#: readelf.c:742 msgid "" " Offset Info Type Symbol's Value Symbol's Name " "Addend\n" msgstr "" -#: readelf.c:743 +#: readelf.c:745 msgid " Offset Info Type Symbol's Value Symbol's Name\n" msgstr "" -#: readelf.c:898 readelf.c:900 +#: readelf.c:900 readelf.c:902 #, c-format msgid "unrecognised: %-7lx" msgstr "" -#: readelf.c:925 +#: readelf.c:927 #, c-format msgid "<string table index %3ld>" msgstr "" -#: readelf.c:1138 +#: readelf.c:1140 #, c-format msgid "Processor Specific: %lx" msgstr "" -#: readelf.c:1157 +#: readelf.c:1159 #, c-format msgid "Operating System specific: %lx" msgstr "" -#: readelf.c:1160 readelf.c:1650 +#: readelf.c:1162 readelf.c:1663 #, c-format msgid "<unknown>: %lx" msgstr "" -#: readelf.c:1174 +#: readelf.c:1176 msgid "NONE (None)" msgstr "" -#: readelf.c:1175 +#: readelf.c:1177 msgid "REL (Relocatable file)" msgstr "" -#: readelf.c:1176 +#: readelf.c:1178 msgid "EXEC (Executable file)" msgstr "" -#: readelf.c:1177 +#: readelf.c:1179 msgid "DYN (Shared object file)" msgstr "" -#: readelf.c:1178 +#: readelf.c:1180 msgid "CORE (Core file)" msgstr "" -#: readelf.c:1182 +#: readelf.c:1184 #, c-format msgid "Processor Specific: (%x)" msgstr "" -#: readelf.c:1184 +#: readelf.c:1186 #, c-format msgid "OS Specific: (%x)" msgstr "" -#: readelf.c:1186 readelf.c:1265 readelf.c:1782 +#: readelf.c:1188 readelf.c:1274 readelf.c:1797 #, c-format msgid "<unknown>: %x" msgstr "" -#: readelf.c:1199 +#: readelf.c:1201 msgid "None" msgstr "" -#: readelf.c:1820 +#: readelf.c:1835 msgid "Usage: readelf {options} elf-file(s)\n" msgstr "" -#: readelf.c:1821 +#: readelf.c:1836 msgid " Options are:\n" msgstr "" -#: readelf.c:1822 +#: readelf.c:1837 msgid " -a or --all Equivalent to: -h -l -S -s -r -d -V -A -I\n" msgstr "" -#: readelf.c:1823 +#: readelf.c:1838 msgid " -h or --file-header Display the ELF file header\n" msgstr "" -#: readelf.c:1824 +#: readelf.c:1839 msgid " -l or --program-headers or --segments\n" msgstr "" -#: readelf.c:1825 +#: readelf.c:1840 msgid " Display the program headers\n" msgstr "" -#: readelf.c:1826 +#: readelf.c:1841 msgid " -S or --section-headers or --sections\n" msgstr "" -#: readelf.c:1827 +#: readelf.c:1842 msgid " Display the sections' header\n" msgstr "" -#: readelf.c:1828 +#: readelf.c:1843 msgid " -e or --headers Equivalent to: -h -l -S\n" msgstr "" -#: readelf.c:1829 +#: readelf.c:1844 msgid " -s or --syms or --symbols Display the symbol table\n" msgstr "" -#: readelf.c:1830 +#: readelf.c:1845 msgid " -n or --notes Display the core notes (if present)\n" msgstr "" -#: readelf.c:1831 +#: readelf.c:1846 msgid " -r or --relocs Display the relocations (if present)\n" msgstr "" -#: readelf.c:1832 +#: readelf.c:1847 msgid " -d or --dynamic Display the dynamic segment (if present)\n" msgstr "" -#: readelf.c:1833 +#: readelf.c:1848 msgid " -V or --version-info Display the version sections (if present)\n" msgstr "" -#: readelf.c:1834 +#: readelf.c:1849 msgid "" " -A or --arch-specific Display architecture specific information (if " "any).\n" msgstr "" -#: readelf.c:1835 +#: readelf.c:1850 msgid "" " -D or --use-dynamic Use the dynamic section info when displaying " "symbols\n" msgstr "" -#: readelf.c:1836 +#: readelf.c:1851 msgid " -x <number> or --hex-dump=<number>\n" msgstr "" -#: readelf.c:1837 +#: readelf.c:1852 msgid " Dump the contents of section <number>\n" msgstr "" -#: readelf.c:1838 -msgid " -w[liapr] or --debug-dump[=line,=info,=abbrev,=pubnames,=ranges]\n" +#: readelf.c:1853 +msgid "" +" -w[liaprf] or --debug-dump[=line,=info,=abbrev,=pubnames,=ranges,=frames]\n" msgstr "" -#: readelf.c:1839 +#: readelf.c:1854 msgid "" " Display the contents of DWARF2 debug sections\n" msgstr "" -#: readelf.c:1841 +#: readelf.c:1856 msgid " -i <number> or --instruction-dump=<number>\n" msgstr "" -#: readelf.c:1842 +#: readelf.c:1857 msgid "" " Disassemble the contents of section <number>\n" msgstr "" -#: readelf.c:1844 +#: readelf.c:1859 msgid " -I or --histogram Display histogram of bucket list lengths\n" msgstr "" -#: readelf.c:1845 +#: readelf.c:1860 msgid " -v or --version Display the version number of readelf\n" msgstr "" -#: readelf.c:1846 +#: readelf.c:1861 msgid " -H or --help Display this information\n" msgstr "" -#: readelf.c:1864 +#: readelf.c:1879 msgid "Out of memory allocating dump request table." msgstr "" -#: readelf.c:1999 +#: readelf.c:2019 #, c-format msgid "Unrecognised debug option '%s'\n" msgstr "" -#: readelf.c:2024 +#: readelf.c:2044 #, c-format msgid "Invalid option '-%c'\n" msgstr "" -#: readelf.c:2037 +#: readelf.c:2057 msgid "Nothing to do.\n" msgstr "" -#: readelf.c:2050 readelf.c:2067 readelf.c:3697 +#: readelf.c:2070 readelf.c:2087 readelf.c:3722 msgid "none" msgstr "" -#: readelf.c:2051 +#: readelf.c:2071 msgid "ELF32" msgstr "" -#: readelf.c:2052 +#: readelf.c:2072 msgid "ELF64" msgstr "" -#: readelf.c:2054 readelf.c:2071 readelf.c:2099 +#: readelf.c:2074 readelf.c:2091 readelf.c:2119 #, c-format msgid "<unknown: %x>" msgstr "" -#: readelf.c:2068 +#: readelf.c:2088 msgid "2's complement, little endian" msgstr "" -#: readelf.c:2069 +#: readelf.c:2089 msgid "2's complement, big endian" msgstr "" -#: readelf.c:2084 +#: readelf.c:2104 msgid "UNIX - System V" msgstr "" -#: readelf.c:2085 +#: readelf.c:2105 msgid "UNIX - HP-UX" msgstr "" -#: readelf.c:2086 +#: readelf.c:2106 msgid "UNIX - NetBSD" msgstr "" -#: readelf.c:2087 +#: readelf.c:2107 msgid "UNIX - Linux" msgstr "" -#: readelf.c:2088 +#: readelf.c:2108 msgid "GNU/Hurd" msgstr "" -#: readelf.c:2089 +#: readelf.c:2109 msgid "UNIX - Solaris" msgstr "" -#: readelf.c:2090 -msgid "UNIX - Monterey" +#: readelf.c:2110 +msgid "UNIX - AIX" msgstr "" -#: readelf.c:2091 +#: readelf.c:2111 msgid "UNIX - IRIX" msgstr "" -#: readelf.c:2092 +#: readelf.c:2112 msgid "UNIX - FreeBSD" msgstr "" -#: readelf.c:2093 +#: readelf.c:2113 msgid "UNIX - TRU64" msgstr "" -#: readelf.c:2094 +#: readelf.c:2114 msgid "Novell - Modesto" msgstr "" -#: readelf.c:2095 +#: readelf.c:2115 msgid "UNIX - OpenBSD" msgstr "" -#: readelf.c:2096 +#: readelf.c:2116 msgid "Standalone App" msgstr "" -#: readelf.c:2097 +#: readelf.c:2117 msgid "ARM" msgstr "" -#: readelf.c:2114 +#: readelf.c:2134 msgid "Not an ELF file - it has the wrong magic bytes at the start\n" msgstr "" -#: readelf.c:2122 +#: readelf.c:2142 msgid "ELF Header:\n" msgstr "" -#: readelf.c:2123 +#: readelf.c:2143 msgid " Magic: " msgstr "" -#: readelf.c:2127 +#: readelf.c:2147 #, c-format msgid " Class: %s\n" msgstr "" -#: readelf.c:2129 +#: readelf.c:2149 #, c-format msgid " Data: %s\n" msgstr "" -#: readelf.c:2131 +#: readelf.c:2151 #, c-format msgid " Version: %d %s\n" msgstr "" -#: readelf.c:2138 +#: readelf.c:2158 #, c-format msgid " OS/ABI: %s\n" msgstr "" -#: readelf.c:2140 +#: readelf.c:2160 #, c-format msgid " ABI Version: %d\n" msgstr "" -#: readelf.c:2142 +#: readelf.c:2162 #, c-format msgid " Type: %s\n" msgstr "" -#: readelf.c:2144 +#: readelf.c:2164 #, c-format msgid " Machine: %s\n" msgstr "" -#: readelf.c:2146 +#: readelf.c:2166 #, c-format msgid " Version: 0x%lx\n" msgstr "" -#: readelf.c:2149 +#: readelf.c:2169 msgid " Entry point address: " msgstr "" -#: readelf.c:2151 +#: readelf.c:2171 msgid "" "\n" " Start of program headers: " msgstr "" -#: readelf.c:2153 +#: readelf.c:2173 msgid "" " (bytes into file)\n" " Start of section headers: " msgstr "" -#: readelf.c:2155 +#: readelf.c:2175 msgid " (bytes into file)\n" msgstr "" -#: readelf.c:2157 +#: readelf.c:2177 #, c-format msgid " Flags: 0x%lx%s\n" msgstr "" -#: readelf.c:2160 +#: readelf.c:2180 #, c-format msgid " Size of this header: %ld (bytes)\n" msgstr "" -#: readelf.c:2162 +#: readelf.c:2182 #, c-format msgid " Size of program headers: %ld (bytes)\n" msgstr "" -#: readelf.c:2164 +#: readelf.c:2184 #, c-format msgid " Number of program headers: %ld\n" msgstr "" -#: readelf.c:2166 +#: readelf.c:2186 #, c-format msgid " Size of section headers: %ld (bytes)\n" msgstr "" -#: readelf.c:2168 +#: readelf.c:2188 #, c-format msgid " Number of section headers: %ld\n" msgstr "" -#: readelf.c:2170 +#: readelf.c:2190 #, c-format msgid " Section header string table index: %ld\n" msgstr "" -#: readelf.c:2255 +#: readelf.c:2275 msgid "" "\n" "There are no program headers in this file.\n" msgstr "" -#: readelf.c:2261 +#: readelf.c:2281 #, c-format msgid "" "\n" "Elf file type is %s\n" msgstr "" -#: readelf.c:2262 +#: readelf.c:2282 msgid "Entry point " msgstr "" -#: readelf.c:2264 +#: readelf.c:2284 #, c-format msgid "" "\n" "There are %d program headers, starting at offset " msgstr "" -#: readelf.c:2275 readelf.c:2451 readelf.c:2493 readelf.c:2536 readelf.c:2577 -#: readelf.c:3090 readelf.c:3131 readelf.c:3307 readelf.c:4315 readelf.c:4329 -#: readelf.c:7097 readelf.c:7137 +#: readelf.c:2295 readelf.c:2471 readelf.c:2513 readelf.c:2556 readelf.c:2597 +#: readelf.c:3115 readelf.c:3156 readelf.c:3332 readelf.c:4340 readelf.c:4354 +#: readelf.c:7597 readelf.c:7637 msgid "Out of memory\n" msgstr "" -#: readelf.c:2293 +#: readelf.c:2313 #, c-format msgid "" "\n" "Program Header%s:\n" msgstr "" -#: readelf.c:2297 +#: readelf.c:2317 msgid "" " Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n" msgstr "" -#: readelf.c:2301 +#: readelf.c:2321 msgid " Type Offset VirtAddr PhysAddr\n" msgstr "" -#: readelf.c:2303 +#: readelf.c:2323 msgid " FileSiz MemSiz Flags Align\n" msgstr "" -#: readelf.c:2361 +#: readelf.c:2381 msgid "more than one dynamic segment\n" msgstr "" -#: readelf.c:2369 +#: readelf.c:2389 msgid "Unable to find program interpreter name\n" msgstr "" -#: readelf.c:2376 +#: readelf.c:2396 #, c-format msgid "" "\n" " [Requesting program interpreter: %s]" msgstr "" -#: readelf.c:2394 +#: readelf.c:2414 msgid "" "\n" " Section to Segment mapping:\n" msgstr "" -#: readelf.c:2395 +#: readelf.c:2415 msgid " Segment Sections...\n" msgstr "" -#: readelf.c:2658 +#: readelf.c:2679 msgid "" "\n" "There are no sections in this file.\n" msgstr "" -#: readelf.c:2664 +#: readelf.c:2685 #, c-format msgid "There are %d section headers, starting at offset 0x%lx:\n" msgstr "" -#: readelf.c:2704 +#: readelf.c:2725 msgid "File contains multiple dynamic symbol tables\n" msgstr "" -#: readelf.c:2717 +#: readelf.c:2738 msgid "File contains multiple dynamic string tables\n" msgstr "" -#: readelf.c:2744 +#: readelf.c:2768 #, c-format msgid "" "\n" "Section Header%s:\n" msgstr "" -#: readelf.c:2748 +#: readelf.c:2772 msgid "" " [Nr] Name Type Addr Off Size ES Flg Lk " "Inf Al\n" msgstr "" -#: readelf.c:2751 +#: readelf.c:2775 msgid " [Nr] Name Type Address Offset\n" msgstr "" -#: readelf.c:2752 +#: readelf.c:2776 msgid " Size EntSize Flags Link Info Align\n" msgstr "" -#: readelf.c:2799 -msgid "" -"Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings)\n" +#: readelf.c:2823 +msgid "Key to Flags:\n" msgstr "" -#: readelf.c:2800 -msgid "" -" I (info), L (link order), O (extra OS processing required)\n" +#: readelf.c:2824 +msgid " W (write), A (alloc), X (execute), M (merge), S (strings)\n" msgstr "" -#: readelf.c:2801 -msgid " o (os specific), p (processor specific) x (unknown)\n" +#: readelf.c:2825 +msgid " I (info), L (link order), G (group), x (unknown)\n" msgstr "" -#: readelf.c:2859 +#: readelf.c:2826 +msgid "" +" O (extra OS processing required) o (OS specific), p (processor specific)\n" +msgstr "" + +#: readelf.c:2884 #, c-format msgid "" "\n" "Relocation section at offset 0x%lx contains %ld bytes:\n" msgstr "" -#: readelf.c:2866 +#: readelf.c:2891 msgid "" "\n" "There are no dynamic relocations in this file.\n" msgstr "" -#: readelf.c:2894 +#: readelf.c:2919 msgid "" "\n" "Relocation section " msgstr "" -#: readelf.c:2901 +#: readelf.c:2926 #, c-format msgid " at offset 0x%lx contains %lu entries:\n" msgstr "" -#: readelf.c:2929 +#: readelf.c:2954 msgid "" "\n" "There are no relocations in this file.\n" msgstr "" -#: readelf.c:3184 +#: readelf.c:3209 msgid "" "\n" "There is no dynamic segment in this file.\n" msgstr "" -#: readelf.c:3218 +#: readelf.c:3243 msgid "Unable to seek to end of file!" msgstr "" -#: readelf.c:3227 +#: readelf.c:3252 msgid "Unable to determine the number of symbols to load\n" msgstr "" -#: readelf.c:3257 +#: readelf.c:3282 msgid "Unable to seek to end of file\n" msgstr "" -#: readelf.c:3263 +#: readelf.c:3288 msgid "Unable to determine the length of the dynamic string table\n" msgstr "" -#: readelf.c:3324 +#: readelf.c:3349 #, c-format msgid "" "\n" "Dynamic segment at offset 0x%x contains %ld entries:\n" msgstr "" -#: readelf.c:3327 +#: readelf.c:3352 msgid " Tag Type Name/Value\n" msgstr "" -#: readelf.c:3363 +#: readelf.c:3388 msgid "Auxiliary library" msgstr "" -#: readelf.c:3367 +#: readelf.c:3392 msgid "Filter library" msgstr "" -#: readelf.c:3371 +#: readelf.c:3396 msgid "Configuration file" msgstr "" -#: readelf.c:3375 +#: readelf.c:3400 msgid "Dependency audit library" msgstr "" -#: readelf.c:3379 +#: readelf.c:3404 msgid "Audit library" msgstr "" -#: readelf.c:3397 readelf.c:3423 readelf.c:3449 +#: readelf.c:3422 readelf.c:3448 readelf.c:3474 msgid "Flags:" msgstr "" -#: readelf.c:3399 readelf.c:3425 readelf.c:3451 +#: readelf.c:3424 readelf.c:3450 readelf.c:3476 msgid " None\n" msgstr "" -#: readelf.c:3570 +#: readelf.c:3595 #, c-format msgid "Shared library: [%s]" msgstr "" -#: readelf.c:3573 +#: readelf.c:3598 msgid " program interpreter" msgstr "" -#: readelf.c:3577 +#: readelf.c:3602 #, c-format msgid "Library soname: [%s]" msgstr "" -#: readelf.c:3581 +#: readelf.c:3606 #, c-format msgid "Library rpath: [%s]" msgstr "" -#: readelf.c:3585 +#: readelf.c:3610 #, c-format msgid "Library runpath: [%s]" msgstr "" -#: readelf.c:3646 +#: readelf.c:3671 #, c-format msgid "Not needed object: [%s]\n" msgstr "" -#: readelf.c:3743 +#: readelf.c:3768 #, c-format msgid "" "\n" "Version definition section '%s' contains %ld entries:\n" msgstr "" -#: readelf.c:3746 +#: readelf.c:3771 msgid " Addr: 0x" msgstr "" -#: readelf.c:3748 readelf.c:3936 +#: readelf.c:3773 readelf.c:3961 #, c-format msgid " Offset: %#08lx Link: %lx (%s)\n" msgstr "" -#: readelf.c:3778 +#: readelf.c:3803 #, c-format msgid " %#06x: Rev: %d Flags: %s" msgstr "" -#: readelf.c:3781 +#: readelf.c:3806 #, c-format msgid " Index: %d Cnt: %d " msgstr "" -#: readelf.c:3792 +#: readelf.c:3817 #, c-format msgid "Name: %s\n" msgstr "" -#: readelf.c:3794 +#: readelf.c:3819 #, c-format msgid "Name index: %ld\n" msgstr "" -#: readelf.c:3809 +#: readelf.c:3834 #, c-format msgid " %#06x: Parent %d: %s\n" msgstr "" -#: readelf.c:3812 +#: readelf.c:3837 #, c-format msgid " %#06x: Parent %d, name index: %ld\n" msgstr "" -#: readelf.c:3831 +#: readelf.c:3856 #, c-format msgid "" "\n" "Version needs section '%s' contains %ld entries:\n" msgstr "" -#: readelf.c:3834 +#: readelf.c:3859 msgid " Addr: 0x" msgstr "" -#: readelf.c:3836 +#: readelf.c:3861 #, c-format msgid " Offset: %#08lx Link to section: %ld (%s)\n" msgstr "" -#: readelf.c:3862 +#: readelf.c:3887 #, c-format msgid " %#06x: Version: %d" msgstr "" -#: readelf.c:3865 +#: readelf.c:3890 #, c-format msgid " File: %s" msgstr "" -#: readelf.c:3867 +#: readelf.c:3892 #, c-format msgid " File: %lx" msgstr "" -#: readelf.c:3869 +#: readelf.c:3894 #, c-format msgid " Cnt: %d\n" msgstr "" -#: readelf.c:3887 +#: readelf.c:3912 #, c-format msgid " %#06x: Name: %s" msgstr "" -#: readelf.c:3890 +#: readelf.c:3915 #, c-format msgid " %#06x: Name index: %lx" msgstr "" -#: readelf.c:3893 +#: readelf.c:3918 #, c-format msgid " Flags: %s Version: %d\n" msgstr "" -#: readelf.c:3931 +#: readelf.c:3956 #, c-format msgid "" "\n" "Version symbols section '%s' contains %d entries:\n" msgstr "" -#: readelf.c:3934 +#: readelf.c:3959 msgid " Addr: " msgstr "" -#: readelf.c:3964 +#: readelf.c:3989 msgid " 0 (*local*) " msgstr "" -#: readelf.c:3968 +#: readelf.c:3993 msgid " 1 (*global*) " msgstr "" -#: readelf.c:4190 +#: readelf.c:4215 msgid "" "\n" "No version information found in this file.\n" msgstr "" -#: readelf.c:4208 readelf.c:4243 +#: readelf.c:4233 readelf.c:4268 #, c-format msgid "<processor specific>: %d" msgstr "" -#: readelf.c:4210 readelf.c:4255 +#: readelf.c:4235 readelf.c:4280 #, c-format msgid "<OS specific>: %d" msgstr "" -#: readelf.c:4212 readelf.c:4258 +#: readelf.c:4237 readelf.c:4283 #, c-format msgid "<unknown>: %d" msgstr "" -#: readelf.c:4321 +#: readelf.c:4346 msgid "Unable to read in dynamic data\n" msgstr "" -#: readelf.c:4363 +#: readelf.c:4388 msgid "Unable to seek to start of dynamic information" msgstr "" -#: readelf.c:4369 +#: readelf.c:4394 msgid "Failed to read in number of buckets\n" msgstr "" -#: readelf.c:4375 +#: readelf.c:4400 msgid "Failed to read in number of chains\n" msgstr "" -#: readelf.c:4395 +#: readelf.c:4420 msgid "" "\n" "Symbol table for image:\n" msgstr "" -#: readelf.c:4397 +#: readelf.c:4422 msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:4399 +#: readelf.c:4424 msgid " Num Buc: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:4443 +#: readelf.c:4468 #, c-format msgid "" "\n" "Symbol table '%s' contains %lu entries:\n" msgstr "" -#: readelf.c:4447 +#: readelf.c:4472 msgid " Num: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:4449 +#: readelf.c:4474 msgid " Num: Value Size Type Bind Vis Ndx Name\n" msgstr "" -#: readelf.c:4558 +#: readelf.c:4583 msgid "bad dynamic symbol" msgstr "" -#: readelf.c:4617 +#: readelf.c:4642 msgid "" "\n" "Dynamic symbol information is not available for displaying symbols.\n" msgstr "" -#: readelf.c:4629 +#: readelf.c:4654 #, c-format msgid "" "\n" "Histogram for bucket list length (total of %d buckets):\n" msgstr "" -#: readelf.c:4631 +#: readelf.c:4656 msgid " Length Number %% of total Coverage\n" msgstr "" -#: readelf.c:4636 readelf.c:4655 readelf.c:6779 readelf.c:6972 +#: readelf.c:4661 readelf.c:4680 readelf.c:7279 readelf.c:7472 msgid "Out of memory" msgstr "" -#: readelf.c:4704 +#: readelf.c:4729 #, c-format msgid "" "\n" "Dynamic info segment at offset 0x%lx contains %d entries:\n" msgstr "" -#: readelf.c:4707 +#: readelf.c:4732 msgid " Num: Name BoundTo Flags\n" msgstr "" -#: readelf.c:4755 +#: readelf.c:4780 #, c-format msgid "" "\n" "Assembly dump of section %s\n" msgstr "" -#: readelf.c:4778 +#: readelf.c:4803 #, c-format msgid "" "\n" "Section '%s' has no data to dump.\n" msgstr "" -#: readelf.c:4783 +#: readelf.c:4808 #, c-format msgid "" "\n" "Hex dump of section '%s':\n" msgstr "" -#: readelf.c:4935 +#: readelf.c:4960 msgid "badly formed extended line op encountered!" msgstr "" -#: readelf.c:4942 +#: readelf.c:4967 #, c-format msgid " Extended opcode %d: " msgstr "" -#: readelf.c:4947 +#: readelf.c:4972 msgid "" "End of Sequence\n" "\n" msgstr "" -#: readelf.c:4953 +#: readelf.c:4978 #, c-format msgid "set Address to 0x%lx\n" msgstr "" -#: readelf.c:4958 +#: readelf.c:4983 msgid " define new File Table entry\n" msgstr "" -#: readelf.c:4959 readelf.c:5081 +#: readelf.c:4984 readelf.c:5106 msgid " Entry\tDir\tTime\tSize\tName\n" msgstr "" -#: readelf.c:4961 +#: readelf.c:4986 #, c-format msgid " %d\t" msgstr "" -#: readelf.c:4964 readelf.c:4966 readelf.c:4968 readelf.c:5093 readelf.c:5095 -#: readelf.c:5097 +#: readelf.c:4989 readelf.c:4991 readelf.c:4993 readelf.c:5118 readelf.c:5120 +#: readelf.c:5122 #, c-format msgid "%lu\t" msgstr "" -#: readelf.c:4969 +#: readelf.c:4994 #, c-format msgid "" "%s\n" "\n" msgstr "" -#: readelf.c:4973 +#: readelf.c:4998 #, c-format msgid "UNKNOWN: length %d\n" msgstr "" -#: readelf.c:4999 +#: readelf.c:5024 #, c-format msgid "" "\n" @@ -2952,497 +2981,502 @@ msgid "" "\n" msgstr "" -#: readelf.c:5011 +#: readelf.c:5036 msgid "The line info appears to be corrupt - the section is too small\n" msgstr "" -#: readelf.c:5019 +#: readelf.c:5044 msgid "Only DWARF version 2 line info is currently supported.\n" msgstr "" -#: readelf.c:5034 +#: readelf.c:5059 #, c-format msgid " Length: %ld\n" msgstr "" -#: readelf.c:5035 +#: readelf.c:5060 #, c-format msgid " DWARF Version: %d\n" msgstr "" -#: readelf.c:5036 +#: readelf.c:5061 #, c-format msgid " Prolgue Length: %d\n" msgstr "" -#: readelf.c:5037 +#: readelf.c:5062 #, c-format msgid " Minimum Instruction Length: %d\n" msgstr "" -#: readelf.c:5038 +#: readelf.c:5063 #, c-format msgid " Initial value of 'is_stmt': %d\n" msgstr "" -#: readelf.c:5039 +#: readelf.c:5064 #, c-format msgid " Line Base: %d\n" msgstr "" -#: readelf.c:5040 +#: readelf.c:5065 #, c-format msgid " Line Range: %d\n" msgstr "" -#: readelf.c:5041 +#: readelf.c:5066 #, c-format msgid " Opcode Base: %d\n" msgstr "" -#: readelf.c:5050 +#: readelf.c:5075 msgid "" "\n" " Opcodes:\n" msgstr "" -#: readelf.c:5053 +#: readelf.c:5078 #, c-format msgid " Opcode %d has %d args\n" msgstr "" -#: readelf.c:5059 +#: readelf.c:5084 msgid "" "\n" " The Directory Table is empty.\n" msgstr "" -#: readelf.c:5062 +#: readelf.c:5087 msgid "" "\n" " The Directory Table:\n" msgstr "" -#: readelf.c:5066 +#: readelf.c:5091 #, c-format msgid " %s\n" msgstr "" -#: readelf.c:5077 +#: readelf.c:5102 msgid "" "\n" " The File Name Table is empty.\n" msgstr "" -#: readelf.c:5080 +#: readelf.c:5105 msgid "" "\n" " The File Name Table:\n" msgstr "" -#: readelf.c:5088 +#: readelf.c:5113 #, c-format msgid " %d\t" msgstr "" -#: readelf.c:5099 +#: readelf.c:5124 #, c-format msgid "%s\n" msgstr "" #. Now display the statements. -#: readelf.c:5107 +#: readelf.c:5132 msgid "" "\n" " Line Number Statements:\n" msgstr "" -#: readelf.c:5126 +#: readelf.c:5151 msgid " Copy\n" msgstr "" -#: readelf.c:5133 +#: readelf.c:5158 #, c-format msgid " Advance PC by %d to %lx\n" msgstr "" -#: readelf.c:5141 +#: readelf.c:5166 #, c-format msgid " Advance Line by %d to %d\n" msgstr "" -#: readelf.c:5148 +#: readelf.c:5173 #, c-format msgid " Set File Name to entry %d in the File Name Table\n" msgstr "" -#: readelf.c:5156 +#: readelf.c:5181 #, c-format msgid " Set column to %d\n" msgstr "" -#: readelf.c:5163 +#: readelf.c:5188 #, c-format msgid " Set is_stmt to %d\n" msgstr "" -#: readelf.c:5168 +#: readelf.c:5193 msgid " Set basic block\n" msgstr "" -#: readelf.c:5176 +#: readelf.c:5201 #, c-format msgid " Advance PC by constant %d to 0x%lx\n" msgstr "" -#: readelf.c:5184 +#: readelf.c:5209 #, c-format msgid " Advance PC by fixed size amount %d to 0x%lx\n" msgstr "" -#: readelf.c:5192 +#: readelf.c:5217 #, c-format msgid " Special opcode %d: advance Address by %d to 0x%lx" msgstr "" -#: readelf.c:5196 +#: readelf.c:5221 #, c-format msgid " and Line by %d to %d\n" msgstr "" -#: readelf.c:5219 readelf.c:5648 +#: readelf.c:5244 readelf.c:5673 #, c-format msgid "" "Contents of the %s section:\n" "\n" msgstr "" -#: readelf.c:5242 +#: readelf.c:5267 msgid "Only DWARF 2 pubnames are currently supported\n" msgstr "" -#: readelf.c:5249 +#: readelf.c:5274 #, c-format msgid " Length: %ld\n" msgstr "" -#: readelf.c:5251 +#: readelf.c:5276 #, c-format msgid " Version: %d\n" msgstr "" -#: readelf.c:5253 +#: readelf.c:5278 #, c-format msgid " Offset into .debug_info section: %ld\n" msgstr "" -#: readelf.c:5255 +#: readelf.c:5280 #, c-format msgid " Size of area in .debug_info section: %ld\n" msgstr "" -#: readelf.c:5258 +#: readelf.c:5283 msgid "" "\n" " Offset\tName\n" msgstr "" -#: readelf.c:5340 +#: readelf.c:5365 #, c-format msgid "Unknown TAG value: %lx" msgstr "" -#: readelf.c:5435 +#: readelf.c:5460 #, c-format msgid "Unknown AT value: %lx" msgstr "" -#: readelf.c:5472 +#: readelf.c:5497 #, c-format msgid "Unknown FORM value: %lx" msgstr "" -#: readelf.c:5654 +#: readelf.c:5679 msgid " Number TAG\n" msgstr "" -#: readelf.c:5660 +#: readelf.c:5685 #, c-format msgid " %ld %s [%s]\n" msgstr "" -#: readelf.c:5663 +#: readelf.c:5688 msgid "has children" msgstr "" -#: readelf.c:5663 +#: readelf.c:5688 msgid "no children" msgstr "" -#: readelf.c:5667 +#: readelf.c:5692 #, c-format msgid " %-18s %s\n" msgstr "" -#: readelf.c:5686 +#: readelf.c:5711 #, c-format msgid " %lu byte block: " msgstr "" -#: readelf.c:5993 +#: readelf.c:6018 msgid "(User defined location op)" msgstr "" -#: readelf.c:5995 +#: readelf.c:6020 msgid "(Unknown location op)" msgstr "" -#: readelf.c:6122 +#: readelf.c:6147 #, c-format msgid "Unable to handle FORM: %d" msgstr "" -#: readelf.c:6126 +#: readelf.c:6151 #, c-format msgid "Unrecognised form: %d" msgstr "" -#: readelf.c:6139 +#: readelf.c:6164 msgid "(not inlined)" msgstr "" -#: readelf.c:6140 +#: readelf.c:6165 msgid "(inlined)" msgstr "" -#: readelf.c:6141 +#: readelf.c:6166 msgid "(declared as inline but ignored)" msgstr "" -#: readelf.c:6142 +#: readelf.c:6167 msgid "(declared as inline and inlined)" msgstr "" -#: readelf.c:6143 +#: readelf.c:6168 #, c-format msgid " (Unknown inline attribute value: %lx)" msgstr "" -#: readelf.c:6272 readelf.c:6398 +#: readelf.c:6297 readelf.c:6423 #, c-format msgid "" "The section %s contains:\n" "\n" msgstr "" -#: readelf.c:6296 +#: readelf.c:6321 msgid "Only version 2 DWARF debug information is currently supported.\n" msgstr "" -#: readelf.c:6300 +#: readelf.c:6325 msgid " Compilation Unit:\n" msgstr "" -#: readelf.c:6301 +#: readelf.c:6326 #, c-format msgid " Length: %ld\n" msgstr "" -#: readelf.c:6302 +#: readelf.c:6327 #, c-format msgid " Version: %d\n" msgstr "" -#: readelf.c:6303 +#: readelf.c:6328 #, c-format msgid " Abbrev Offset: %ld\n" msgstr "" -#: readelf.c:6304 +#: readelf.c:6329 #, c-format msgid " Pointer Size: %d\n" msgstr "" -#: readelf.c:6324 +#: readelf.c:6349 msgid "Unable to locate .debug_abbrev section!\n" msgstr "" -#: readelf.c:6364 +#: readelf.c:6389 #, c-format msgid "Unable to locate entry %lu in the abbreviation table\n" msgstr "" -#: readelf.c:6369 +#: readelf.c:6394 #, c-format msgid " <%d><%x>: Abbrev Number: %lu (%s)\n" msgstr "" -#: readelf.c:6419 +#: readelf.c:6444 msgid "Only DWARF 2 aranges are currently supported.\n" msgstr "" -#: readelf.c:6423 +#: readelf.c:6448 #, c-format msgid " Length: %ld\n" msgstr "" -#: readelf.c:6424 +#: readelf.c:6449 #, c-format msgid " Version: %d\n" msgstr "" -#: readelf.c:6425 +#: readelf.c:6450 #, c-format msgid " Offset into .debug_info: %lx\n" msgstr "" -#: readelf.c:6426 +#: readelf.c:6451 #, c-format msgid " Pointer Size: %d\n" msgstr "" -#: readelf.c:6427 +#: readelf.c:6452 #, c-format msgid " Segment Size: %d\n" msgstr "" -#: readelf.c:6429 +#: readelf.c:6454 msgid "" "\n" " Address Length\n" msgstr "" -#: readelf.c:6470 +#: readelf.c:6598 +#, c-format +msgid "The section %s contains:\n" +msgstr "" + +#: readelf.c:6968 #, c-format msgid "Displaying the debug contents of section %s is not yet supported.\n" msgstr "" -#: readelf.c:6532 +#: readelf.c:7032 #, c-format msgid "" "\n" "Section '%s' has no debugging data.\n" msgstr "" -#: readelf.c:6548 +#: readelf.c:7048 #, c-format msgid "Unrecognised debug section: %s\n" msgstr "" -#: readelf.c:6620 +#: readelf.c:7120 msgid "Some sections were not dumped because they do not exist!\n" msgstr "" -#: readelf.c:6803 +#: readelf.c:7303 #, c-format msgid "" "\n" "Section '%s' contains %d entries:\n" msgstr "" -#: readelf.c:6965 +#: readelf.c:7465 msgid "conflict list with without table" msgstr "" -#: readelf.c:6993 +#: readelf.c:7493 #, c-format msgid "" "\n" "Section '.conflict' contains %d entries:\n" msgstr "" -#: readelf.c:6994 +#: readelf.c:7494 msgid " Num: Index Value Name" msgstr "" -#: readelf.c:7019 +#: readelf.c:7519 msgid "NT_PRSTATUS (prstatus structure)" msgstr "" -#: readelf.c:7020 +#: readelf.c:7520 msgid "NT_FPREGSET (floating point registers)" msgstr "" -#: readelf.c:7021 +#: readelf.c:7521 msgid "NT_PRPSINFO (prpsinfo structure)" msgstr "" -#: readelf.c:7022 +#: readelf.c:7522 msgid "NT_TASKSTRUCT (task structure)" msgstr "" -#: readelf.c:7023 +#: readelf.c:7523 msgid "NT_PRXFPREG (user_xfpregs structure)" msgstr "" -#: readelf.c:7024 +#: readelf.c:7524 msgid "NT_PSTATUS (pstatus structure)" msgstr "" -#: readelf.c:7025 +#: readelf.c:7525 msgid "NT_FPREGS (floating point registers)" msgstr "" -#: readelf.c:7026 +#: readelf.c:7526 msgid "NT_PSINFO (psinfo structure)" msgstr "" -#: readelf.c:7027 +#: readelf.c:7527 msgid "NT_LWPSTATUS (lwpstatus_t structure)" msgstr "" -#: readelf.c:7028 +#: readelf.c:7528 msgid "NT_LWPSINFO (lwpsinfo_t structure)" msgstr "" -#: readelf.c:7029 +#: readelf.c:7529 msgid "NT_WIN32PSTATUS (win32_pstatus strcuture)" msgstr "" -#: readelf.c:7031 +#: readelf.c:7531 #, c-format msgid "Unknown note type: (0x%08x)" msgstr "" -#: readelf.c:7069 +#: readelf.c:7569 #, c-format msgid "" "\n" "Notes at offset 0x%08lx with length 0x%08lx:\n" msgstr "" -#: readelf.c:7071 +#: readelf.c:7571 msgid " Owner\t\tData size\tDescription\n" msgstr "" -#: readelf.c:7182 +#: readelf.c:7682 msgid "No note segments present in the core file.\n" msgstr "" -#: readelf.c:7260 +#: readelf.c:7760 msgid "This instance of readelf has been built without support for a\n" msgstr "" -#: readelf.c:7261 +#: readelf.c:7761 msgid "64 bit data type and so it cannot read 64 bit ELF files.\n" msgstr "" -#: readelf.c:7296 +#: readelf.c:7796 #, c-format msgid "Cannot stat input file %s.\n" msgstr "" -#: readelf.c:7303 +#: readelf.c:7803 #, c-format msgid "Input file %s not found.\n" msgstr "" -#: readelf.c:7309 +#: readelf.c:7809 #, c-format msgid "%s: Failed to read file header\n" msgstr "" -#: readelf.c:7323 +#: readelf.c:7823 #, c-format msgid "" "\n" diff --git a/binutils/readelf.c b/binutils/readelf.c index 99d1b9831dc..a9c5cbf8a25 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -1471,6 +1471,9 @@ get_machine_flags (e_flags, e_machine) if ((e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_4) strcat (buf, ", mips4"); + if ((e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32) + strcat (buf, ", mips32"); + switch ((e_flags & EF_MIPS_MACH)) { case E_MIPS_MACH_3900: strcat (buf, ", 3900"); break; @@ -1478,7 +1481,8 @@ get_machine_flags (e_flags, e_machine) case E_MIPS_MACH_4100: strcat (buf, ", 4100"); break; case E_MIPS_MACH_4650: strcat (buf, ", 4650"); break; case E_MIPS_MACH_4111: strcat (buf, ", 4111"); break; - case E_MIPS_MACH_MIPS32: strcat (buf, ", mips32"); break; + case E_MIPS_MACH_MIPS32_4K: strcat (buf, ", mips32-4k"); break; + default: strcat (buf, " UNKNOWN"); break; } break; diff --git a/config.sub b/config.sub index af79d70a907..f8d46e4efca 100755 --- a/config.sub +++ b/config.sub @@ -211,10 +211,11 @@ esac case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. - tahoe | i860 | ia64 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \ - | arme[lb] | armv[2345] | armv[345][lb] | pyramid | mn10200 | mn10300 | tron | a29k \ + tahoe | i860 | ia64 | m32r | m68k | m68000 | m88k | ns32k | arc \ + | arm | arme[lb] | arm[bl]e | armv[2345] | armv[345][lb] | strongarm | xscale \ + | pyramid | mn10200 | mn10300 | tron | a29k \ | 580 | i960 | h8300 \ - | x86 | ppcbe | mipsbe | mipsle | shbe | shle | armbe | armle \ + | x86 | ppcbe | mipsbe | mipsle | shbe | shle \ | hppa | hppa1.0 | hppa1.1 | hppa2.0 | hppa2.0w | hppa2.0n \ | hppa64 \ | alpha | alphaev[4-8] | alphaev56 | alphapca5[67] \ @@ -251,11 +252,12 @@ case $basic_machine in # Recognize the basic CPU types with company name. # FIXME: clean up the formatting here. vax-* | tahoe-* | i[234567]86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \ - | m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | arm-* | c[123]* \ + | m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | c[123]* \ + | arm-* | armbe-* | armle-* | armv*-* | strongarm-* | xscale-* \ | mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \ | power-* | none-* | 580-* | cray2-* | h8300-* | h8500-* | i960-* \ | xmp-* | ymp-* \ - | x86-* | ppcbe-* | mipsbe-* | mipsle-* | shbe-* | shle-* | armbe-* | armle-* \ + | x86-* | ppcbe-* | mipsbe-* | mipsle-* | shbe-* | shle-* \ | hppa-* | hppa1.0-* | hppa1.1-* | hppa2.0-* | hppa2.0w-* \ | hppa2.0n-* | hppa64-* \ | alpha-* | alphaev[4-8]-* | alphaev56-* | alphapca5[67]-* \ @@ -267,7 +269,7 @@ case $basic_machine in | mips64el-* | mips64orion-* | mips64orionel-* \ | mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \ | mipstx39-* | mipstx39el-* | mcore-* \ - | f301-* | armv*-* | s390-* | sv1-* | t3e-* \ + | f301-* | s390-* | sv1-* | t3e-* \ | m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \ | thumb-* | v850-* | d30v-* | tic30-* | c30-* | fr30-* \ | bs2000-* | tic54x-* | c54x-* | x86_64-*) diff --git a/gas/ChangeLog b/gas/ChangeLog index 9c8a3df0be3..8de2b356325 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -13,6 +13,45 @@ operand specifiers. Change warning generated by 'B' operand specifier to reflect its new multi-purpose usage. + * config/tc-mips.c (mips_set_options): Use ISA_UNKNOWN rather than + -1, and update comment. + (file_mips_isa): Likewise. + (mips_cpu): Use CPU_UNKNOWN rather than -1, and update comment. + (ISA_HAS_COPROC_DELAYS, ISA_HAS_64BIT_REGS, gpr_interlocks): Use + ISA_* constants rather than hard-coded numbers. + (mips_cpu_info): New structure. + (mips_cpu_info_table): New table describing CPU and ISA names + and numbers. + (mips_cpu_info_from_name, mips_cpu_info_from_isa, + mips_cpu_info_from_cpu): New functions. + (mips_isa_to_str): New function to get string for ISA name. + (mips_cpu_to_str): Convert to use mips_cpu_info_from_cpu, and + return const char *. + (md_begin): Redo CPU and ISA selection logic, using + mips_cpu_info_from_*. Convert to use ISA_* constants rather + than hard-coded numbers. + (append_insn, mips_emit_delays, macro, macro2): Convert to use + ISA_* constants rather than hard-coded numbers. + (mips_ip): Convert to use mips_isa_to_str to get ISA name. + (md_longopts): Delete OPTION_NO_MIPS32. + (md_parse_option): Convert to use ISA_* constants rather than + hard-coded numbers. Make OPTIONS_MIPS32 case treat MIPS32 + as an ISA. Delete OPTION_NO_MIPS32 case. Convert OPTION_MCPU + to use strcasecmp to recognize "default" and to use + mips_cpu_info_from_name to get CPU numbers from argument. + (md_show_usage): Move -mips32 so it's with the rest of the ISA + flags. Change 4Kc, 4Kp and 4Km CPU entries to just be + mips32-4k. + (s_mipsset): Accept ISA value 32. + * doc/as.texinfo: Clean up MIPS options summary slightly, + remove -no-mips32. Add note about -mips4 and -mips32 + specifying those ISA levels. Delete -mips32 and -no-mips32 + cpu flag descriptions. + * doc/c-mips.texi: Add -mips32 to list of ISA switches. Clean + up the supported CPU switch list, and replace 4Kc, 4Km, and + 4Kp entries with a single mips32-4k entry. Note that you can + use ".set mips32". + 2000-12-01 Joel Sherrill <joel@OARcorp.com> * configure.in (arm-*-rtems*, a29k-*rtems*, h8300-*-rtems*): diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 568d2615fe7..fb8c5e6ede3 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -187,10 +187,13 @@ struct mips_set_options }; /* This is the struct we use to hold the current set of options. Note - that we must set the isa and mips16 fields to -1 to indicate that - they have not been initialized. */ + that we must set the isa field to ISA_UNKNOWN and the mips16 field to + -1 to indicate that they have not been initialized. */ -static struct mips_set_options mips_opts = { -1, -1, 0, 0, 0, 0, 0, 0 }; +static struct mips_set_options mips_opts = +{ + ISA_UNKNOWN, -1, 0, 0, 0, 0, 0, 0 +}; /* These variables are filled in with the masks of registers used. The object format code reads them and puts them in the appropriate @@ -199,10 +202,10 @@ unsigned long mips_gprmask; unsigned long mips_cprmask[4]; /* MIPS ISA we are using for this output file. */ -static int file_mips_isa; +static int file_mips_isa = ISA_UNKNOWN; -/* The CPU type as a number: 2000, 3000, 4000, 4400, etc. */ -static int mips_cpu = -1; +/* The CPU type we are using for this output file. */ +static int mips_cpu = CPU_UNKNOWN; /* The argument of the -mabi= flag. */ static char* mips_abi_string = 0; @@ -226,15 +229,15 @@ static int mips_gp32 = 0; also assume that ISAs which don't have delays for these insns, don't have delays for the INSN_LOAD_MEMORY_DELAY instructions either. */ #define ISA_HAS_COPROC_DELAYS(ISA) ( \ - (ISA) == 1 \ - || (ISA) == 2 \ - || (ISA) == 3 \ + (ISA) == ISA_MIPS1 \ + || (ISA) == ISA_MIPS2 \ + || (ISA) == ISA_MIPS3 \ ) /* Return true if ISA supports 64 bit gp register instructions. */ #define ISA_HAS_64BIT_REGS(ISA) ( \ - (ISA) == 3 \ - || (ISA) == 4 \ + (ISA) == ISA_MIPS3 \ + || (ISA) == ISA_MIPS4 \ ) /* Whether the processor uses hardware interlocks to protect @@ -270,7 +273,7 @@ static int mips_gp32 = 0; /* Whether the processor uses hardware interlocks to protect reads from the GPRs, and thus does not require nops to be inserted. */ #define gpr_interlocks \ - (mips_opts.isa != 1 \ + (mips_opts.isa != ISA_MIPS1 \ || mips_cpu == CPU_R3900) /* As with other "interlocks" this is used by hardware that has FP @@ -706,9 +709,24 @@ static void s_mips_stab PARAMS ((int)); static void s_mips_weakext PARAMS ((int)); static void s_file PARAMS ((int)); static int mips16_extended_frag PARAMS ((fragS *, asection *, long)); -static char *mips_cpu_to_str PARAMS ((int)); - +static const char *mips_isa_to_str PARAMS ((int)); +static const char *mips_cpu_to_str PARAMS ((int)); static int validate_mips_insn PARAMS ((const struct mips_opcode *)); + +/* Table and functions used to map between CPU/ISA names, and + ISA levels, and CPU numbers. */ + +struct mips_cpu_info +{ + const char *name; /* CPU or ISA name. */ + int is_isa; /* Is this an ISA? (If 0, a CPU.) */ + int isa; /* ISA level. */ + int cpu; /* CPU number (default CPU if ISA). */ +}; + +static const struct mips_cpu_info *mips_cpu_info_from_name PARAMS ((const char *)); +static const struct mips_cpu_info *mips_cpu_info_from_isa PARAMS ((int)); +static const struct mips_cpu_info *mips_cpu_info_from_cpu PARAMS ((int)); /* Pseudo-op table. @@ -852,33 +870,34 @@ static boolean mips16_small, mips16_ext; static segT pdr_seg; #endif -static char * +static const char * +mips_isa_to_str (isa) + int isa; +{ + const struct mips_cpu_info *ci; + static char s[20]; + + ci = mips_cpu_info_from_isa (isa); + if (ci != NULL) + return (ci->name); + + sprintf (s, "ISA#%d", isa); + return s; +} + +static const char * mips_cpu_to_str (cpu) int cpu; { + const struct mips_cpu_info *ci; static char s[16]; - switch (cpu) - { - case CPU_R2000: return "R2000"; - case CPU_R3000: return "R3000"; - case CPU_R3900: return "R3900"; - case CPU_R4000: return "R4000"; - case CPU_R4010: return "R4010"; - case CPU_VR4100: return "VR4100"; - case CPU_R4111: return "R4111"; - case CPU_R4300: return "R4300"; - case CPU_R4400: return "R4400"; - case CPU_R4600: return "R4600"; - case CPU_R4650: return "R4650"; - case CPU_R5000: return "R5000"; - case CPU_R6000: return "R6000"; - case CPU_R8000: return "R8000"; - case CPU_R10000: return "R10000"; - case CPU_4K: return "4K"; - default: - sprintf (s, "%d", cpu); - return s; - } + + ci = mips_cpu_info_from_cpu (cpu); + if (ci != NULL) + return (ci->name); + + sprintf (s, "CPU#%d", cpu); + return s; } /* This function is called once, at assembler startup time. It should @@ -887,13 +906,14 @@ mips_cpu_to_str (cpu) void md_begin () { - boolean ok = false; register const char *retval = NULL; int i = 0; const char *cpu; char *a = NULL; int broken = 0; int mips_isa_from_cpu; + int target_cpu_had_mips16 = 0; + const struct mips_cpu_info *ci; /* GP relative stuff not working for PE */ if (strncmp (TARGET_OS, "pe", 2) == 0 @@ -913,130 +933,52 @@ md_begin () cpu = a; } - if (mips_cpu < 0) + if (strncmp (cpu, "mips16", sizeof "mips16" - 1) == 0) { - /* Set mips_cpu based on TARGET_CPU, unless TARGET_CPU is - just the generic 'mips', in which case set mips_cpu based - on the given ISA, if any. */ - - if (strcmp (cpu, "mips") == 0) - { - if (mips_opts.isa < 0) - mips_cpu = CPU_R3000; - - else if (mips_opts.isa == 2) - mips_cpu = CPU_R6000; - - else if (mips_opts.isa == 3) - mips_cpu = CPU_R4000; - - else if (mips_opts.isa == 4) - mips_cpu = CPU_R8000; - - else - mips_cpu = CPU_R3000; - } - - else if (strcmp (cpu, "r3900") == 0 - || strcmp (cpu, "mipstx39") == 0 - ) - mips_cpu = CPU_R3900; - - else if (strcmp (cpu, "r6000") == 0 - || strcmp (cpu, "mips2") == 0) - mips_cpu = CPU_R6000; - - else if (strcmp (cpu, "mips64") == 0 - || strcmp (cpu, "r4000") == 0 - || strcmp (cpu, "mips3") == 0) - mips_cpu = CPU_R4000; - - else if (strcmp (cpu, "r4400") == 0) - mips_cpu = CPU_R4400; - - else if (strcmp (cpu, "mips64orion") == 0 - || strcmp (cpu, "r4600") == 0) - mips_cpu = CPU_R4600; - - else if (strcmp (cpu, "r4650") == 0) - mips_cpu = CPU_R4650; - - else if (strcmp (cpu, "mips64vr4300") == 0) - mips_cpu = CPU_R4300; - - else if (strcmp (cpu, "mips64vr4111") == 0) - mips_cpu = CPU_R4111; - - else if (strcmp (cpu, "mips64vr4100") == 0) - mips_cpu = CPU_VR4100; - - else if (strcmp (cpu, "r4010") == 0) - mips_cpu = CPU_R4010; - - else if (strcmp (cpu, "4Kc") == 0 - || strcmp (cpu, "4Kp") == 0 - || strcmp (cpu, "4Km") == 0) - mips_cpu = CPU_4K; - - else if (strcmp (cpu, "r5000") == 0 - || strcmp (cpu, "mips64vr5000") == 0) - mips_cpu = CPU_R5000; - - else if (strcmp (cpu, "r8000") == 0 - || strcmp (cpu, "mips4") == 0) - mips_cpu = CPU_R8000; - - else if (strcmp (cpu, "r10000") == 0) - mips_cpu = CPU_R10000; - - else if (strcmp (cpu, "mips16") == 0) - mips_cpu = 0; /* FIXME */ - - else - mips_cpu = CPU_R3000; + target_cpu_had_mips16 = 1; + cpu += sizeof "mips16" - 1; } - if (mips_cpu == CPU_R3000 - || mips_cpu == CPU_R3900) - mips_isa_from_cpu = 1; - - else if (mips_cpu == CPU_R6000 - || mips_cpu == CPU_R4010) - mips_isa_from_cpu = 2; - - else if (mips_cpu == CPU_R4000 - || mips_cpu == CPU_VR4100 - || mips_cpu == CPU_R4111 - || mips_cpu == CPU_R4400 - || mips_cpu == CPU_R4300 - || mips_cpu == CPU_R4600 - || mips_cpu == CPU_R4650) - mips_isa_from_cpu = 3; - - else if (mips_cpu == CPU_R5000 - || mips_cpu == CPU_R8000 - || mips_cpu == CPU_R10000) - mips_isa_from_cpu = 4; - - else - mips_isa_from_cpu = -1; + if (mips_opts.mips16 < 0) + mips_opts.mips16 = target_cpu_had_mips16; - if (mips_opts.isa == -1) + /* At this point, mips_cpu will either be CPU_UNKNOWN if no CPU was + specified on the command line, or some other value if one was. + Similarly, mips_opts.isa will be ISA_UNKNOWN if not specified on + the command line, or will be set otherwise if one was. */ + if (mips_cpu != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN) { - if (mips_isa_from_cpu != -1) - mips_opts.isa = mips_isa_from_cpu; - else - mips_opts.isa = 1; + /* We have it all. There's nothing to do. */ } - - if (mips_opts.mips16 < 0) + else if (mips_cpu != CPU_UNKNOWN && mips_opts.isa == ISA_UNKNOWN) { - if (strncmp (TARGET_CPU, "mips16", sizeof "mips16" - 1) == 0) - mips_opts.mips16 = 1; - else - mips_opts.mips16 = 0; + /* We have CPU, we need ISA. */ + ci = mips_cpu_info_from_cpu (mips_cpu); + assert (ci != NULL); + mips_opts.isa = ci->isa; + } + else if (mips_cpu == CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN) + { + /* We have ISA, we need default CPU. */ + ci = mips_cpu_info_from_isa (mips_opts.isa); + assert (ci != NULL); + mips_cpu = ci->cpu; + } + else + { + /* We need to set both ISA and CPU from target cpu. */ + ci = mips_cpu_info_from_name (cpu); + if (ci == NULL) + ci = mips_cpu_info_from_cpu (CPU_R3000); + assert (ci != NULL); + mips_opts.isa = ci->isa; + mips_cpu = ci->cpu; } + ci = mips_cpu_info_from_cpu (mips_cpu); + assert (ci != NULL); + mips_isa_from_cpu = ci->isa; + /* End of TARGET_CPU processing, get rid of malloced memory if necessary. */ cpu = NULL; @@ -1046,7 +988,7 @@ md_begin () a = NULL; } - if (mips_opts.isa == 1 && mips_trap) + if (mips_opts.isa == ISA_MIPS1 && mips_trap) as_bad (_("trap exception not supported at ISA 1")); /* Set the EABI kind based on the ISA before the user gets @@ -1057,37 +999,14 @@ md_begin () && 0 == strcmp (mips_abi_string,"eabi")) mips_eabi64 = 1; - if (mips_cpu != 0 && mips_cpu != -1) - { - ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_cpu); - - /* If they asked for mips1 or mips2 and a cpu that is - mips3 or greater, then mark the object file 32BITMODE. */ - if (mips_isa_from_cpu != -1 - && ! ISA_HAS_64BIT_REGS (mips_opts.isa) - && ISA_HAS_64BIT_REGS (mips_isa_from_cpu)) - mips_32bitmode = 1; - } - else - { - switch (mips_opts.isa) - { - case 1: - ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, CPU_R3000); - break; - case 2: - ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, CPU_R6000); - break; - case 3: - ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, CPU_R4000); - break; - case 4: - ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, CPU_R8000); - break; - } - } + /* If they asked for mips1 or mips2 and a cpu that is + mips3 or greater, then mark the object file 32BITMODE. */ + if (mips_isa_from_cpu != ISA_UNKNOWN + && ! ISA_HAS_64BIT_REGS (mips_opts.isa) + && ISA_HAS_64BIT_REGS (mips_isa_from_cpu)) + mips_32bitmode = 1; - if (! ok) + if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_cpu)) as_warn (_("Could not set architecture and machine")); file_mips_isa = mips_opts.isa; @@ -1549,7 +1468,7 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) && ISA_HAS_COPROC_DELAYS (mips_opts.isa) && (((prev_pinfo & INSN_COPROC_MOVE_DELAY) && ! cop_interlocks) - || (mips_opts.isa == 1 + || (mips_opts.isa == ISA_MIPS1 && (prev_pinfo & INSN_COPROC_MEMORY_DELAY)))) { /* A generic coprocessor delay. The previous instruction @@ -2083,7 +2002,7 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) && ! gpr_interlocks && (prev_pinfo & INSN_LOAD_MEMORY_DELAY)) || (! mips_opts.mips16 - && mips_opts.isa == 1 + && mips_opts.isa == ISA_MIPS1 /* Itbl support may require additional care here. */ && (prev_pinfo & INSN_COPROC_MEMORY_DELAY)) /* We can not swap with a branch instruction. */ @@ -2419,7 +2338,7 @@ mips_emit_delays (insns) && (prev_insn.insn_mo->pinfo & INSN_LOAD_MEMORY_DELAY)) || (! mips_opts.mips16 - && mips_opts.isa == 1 + && mips_opts.isa == ISA_MIPS1 && (prev_insn.insn_mo->pinfo & INSN_COPROC_MEMORY_DELAY))) { @@ -5421,7 +5340,7 @@ macro (ip) s = segment_name (S_GET_SEGMENT (offset_expr.X_add_symbol)); if (strcmp (s, ".lit8") == 0) { - if (mips_opts.isa != 1) + if (mips_opts.isa != ISA_MIPS1) { macro_build ((char *) NULL, &icnt, &offset_expr, "ldc1", "T,o(b)", treg, (int) BFD_RELOC_MIPS_LITERAL, GP); @@ -5446,7 +5365,7 @@ macro (ip) macro_build_lui ((char *) NULL, &icnt, &offset_expr, AT); } - if (mips_opts.isa != 1) + if (mips_opts.isa != ISA_MIPS1) { macro_build ((char *) NULL, &icnt, &offset_expr, "ldc1", "T,o(b)", treg, (int) BFD_RELOC_LO16, AT); @@ -5473,7 +5392,7 @@ macro (ip) to adjust when loading from memory. */ r = BFD_RELOC_LO16; dob: - assert (mips_opts.isa == 1); + assert (mips_opts.isa == ISA_MIPS1); macro_build ((char *) NULL, &icnt, &offset_expr, "lwc1", "T,o(b)", target_big_endian ? treg + 1 : treg, (int) r, breg); @@ -5512,7 +5431,7 @@ macro (ip) } /* Itbl support may require additional care here. */ coproc = 1; - if (mips_opts.isa != 1) + if (mips_opts.isa != ISA_MIPS1) { s = "ldc1"; goto ld; @@ -5529,7 +5448,7 @@ macro (ip) return; } - if (mips_opts.isa != 1) + if (mips_opts.isa != ISA_MIPS1) { s = "sdc1"; goto st; @@ -6157,7 +6076,7 @@ macro2 (ip) as_bad (_("opcode not supported on this processor")); return; } - assert (mips_opts.isa == 1); + assert (mips_opts.isa == ISA_MIPS1); /* Even on a big endian machine $fn comes before $fn+1. We have to adjust when storing to memory. */ macro_build ((char *) NULL, &icnt, &offset_expr, "swc1", "T,o(b)", @@ -6466,7 +6385,7 @@ macro2 (ip) case M_TRUNCWS: case M_TRUNCWD: - assert (mips_opts.isa == 1); + assert (mips_opts.isa == ISA_MIPS1); sreg = (ip->insn_opcode >> 11) & 0x1f; /* floating reg */ dreg = (ip->insn_opcode >> 06) & 0x1f; /* floating reg */ @@ -7146,8 +7065,9 @@ mips_ip (str, ip) { static char buf[100]; sprintf (buf, - _("opcode not supported on this processor: %s (MIPS%d)"), - mips_cpu_to_str (mips_cpu), mips_opts.isa); + _("opcode not supported on this processor: %s (%s)"), + mips_cpu_to_str (mips_cpu), + mips_isa_to_str (mips_opts.isa)); insn_error = buf; return; @@ -8964,9 +8884,6 @@ struct option md_longopts[] = {"no-construct-floats", no_argument, NULL, OPTION_NO_CONSTRUCT_FLOATS}, #define OPTION_MIPS32 (OPTION_MD_BASE + 28) {"mips32", no_argument, NULL, OPTION_MIPS32}, -#define OPTION_NO_MIPS32 (OPTION_MD_BASE + 29) - {"no-mips32", no_argument, NULL, OPTION_NO_MIPS32}, - #ifdef OBJ_ELF #define OPTION_ELF_BASE (OPTION_MD_BASE + 35) #define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0) @@ -9037,154 +8954,39 @@ md_parse_option (c, arg) break; case OPTION_MIPS1: - mips_opts.isa = 1; + mips_opts.isa = ISA_MIPS1; break; case OPTION_MIPS2: - mips_opts.isa = 2; + mips_opts.isa = ISA_MIPS2; break; case OPTION_MIPS3: - mips_opts.isa = 3; + mips_opts.isa = ISA_MIPS3; break; case OPTION_MIPS4: - mips_opts.isa = 4; + mips_opts.isa = ISA_MIPS4; + break; + + case OPTION_MIPS32: + mips_opts.isa = ISA_MIPS32; break; case OPTION_MCPU: { - char *p; - - /* Identify the processor type */ - p = arg; - if (strcmp (p, "default") == 0 - || strcmp (p, "DEFAULT") == 0) - mips_cpu = -1; + /* Identify the processor type. */ + if (strcasecmp (arg, "default") == 0) + mips_cpu = CPU_UNKNOWN; else { - int sv = 0; - - /* We need to cope with the various "vr" prefixes for the 4300 - processor. */ - if (*p == 'v' || *p == 'V') - { - sv = 1; - p++; - } - - if (*p == 'r' || *p == 'R') - p++; - - mips_cpu = -1; - switch (*p) - { - case '1': - if (strcmp (p, "10000") == 0 - || strcmp (p, "10k") == 0 - || strcmp (p, "10K") == 0) - mips_cpu = CPU_R10000; - break; - - case '2': - if (strcmp (p, "2000") == 0 - || strcmp (p, "2k") == 0 - || strcmp (p, "2K") == 0) - mips_cpu = CPU_R2000; - break; - - case '3': - if (strcmp (p, "3000") == 0 - || strcmp (p, "3k") == 0 - || strcmp (p, "3K") == 0) - mips_cpu = CPU_R3000; - else if (strcmp (p, "3900") == 0) - mips_cpu = CPU_R3900; - break; - - case '4': - if (strcmp (p, "4000") == 0 - || strcmp (p, "4k") == 0 - || strcmp (p, "4K") == 0) - mips_cpu = CPU_R4000; - else if (strcmp (p, "4100") == 0) - mips_cpu = CPU_VR4100; - else if (strcmp (p, "4111") == 0) - mips_cpu = CPU_R4111; - else if (strcmp (p, "4300") == 0) - mips_cpu = CPU_R4300; - else if (strcmp (p, "4400") == 0) - mips_cpu = CPU_R4400; - else if (strcmp (p, "4600") == 0) - mips_cpu = CPU_R4600; - else if (strcmp (p, "4650") == 0) - mips_cpu = CPU_R4650; - else if (strcmp (p, "4010") == 0) - mips_cpu = CPU_R4010; - else if (strcmp (p, "4Kc") == 0 - || strcmp (p, "4Kp") == 0 - || strcmp (p, "4Km") == 0) - mips_cpu = CPU_MIPS32; - break; - - case '5': - if (strcmp (p, "5000") == 0 - || strcmp (p, "5k") == 0 - || strcmp (p, "5K") == 0) - mips_cpu = CPU_R5000; - break; - - case '6': - if (strcmp (p, "6000") == 0 - || strcmp (p, "6k") == 0 - || strcmp (p, "6K") == 0) - mips_cpu = CPU_R6000; - break; - - case '8': - if (strcmp (p, "8000") == 0 - || strcmp (p, "8k") == 0 - || strcmp (p, "8K") == 0) - mips_cpu = CPU_R8000; - break; - - case 'o': - if (strcmp (p, "orion") == 0) - mips_cpu = CPU_R4600; - break; - - case 'm': - case 'M': - switch (atoi (p + 1)) - { - case 5200: - case 5230: - case 5231: - case 5261: - case 5721: - case 7000: - mips_cpu = CPU_R5000; - break; - default: - break; - } - } - - if (sv - && (mips_cpu != CPU_R4300 - && mips_cpu != CPU_VR4100 - && mips_cpu != CPU_R4111 - && mips_cpu != CPU_R5000)) - { - as_bad (_("ignoring invalid leading 'v' in -mcpu=%s switch"), arg); - return 0; - } + const struct mips_cpu_info *ci; - if (mips_cpu == -1) - { - as_bad (_("invalid architecture -mcpu=%s"), arg); - return 0; - } + ci = mips_cpu_info_from_name (arg); + if (ci == NULL || ci->is_isa) + as_bad (_("invalid architecture -mcpu=%s"), arg); + else + mips_cpu = ci->cpu; } } break; @@ -9210,13 +9012,6 @@ md_parse_option (c, arg) case OPTION_NO_M4100: break; - case OPTION_MIPS32: - mips_cpu = CPU_MIPS32; - break; - - case OPTION_NO_MIPS32: - break; - case OPTION_M3900: mips_cpu = CPU_R3900; break; @@ -9411,6 +9206,7 @@ MIPS options:\n\ -mips2 generate MIPS ISA II instructions\n\ -mips3 generate MIPS ISA III instructions\n\ -mips4 generate MIPS ISA IV instructions\n\ +-mips32 generate MIPS32 ISA instructions\n\ -mcpu=CPU generate code for CPU, where CPU is one of:\n")); first = 1; @@ -9430,9 +9226,7 @@ MIPS options:\n\ show (stream, "6000", &column, &first); show (stream, "8000", &column, &first); show (stream, "10000", &column, &first); - show (stream, "4Kc", &column, &first); - show (stream, "4Kp", &column, &first); - show (stream, "4Km", &column, &first); + show (stream, "mips32-4k", &column, &first); fputc ('\n', stream); fprintf (stream, _("\ @@ -9448,9 +9242,6 @@ MIPS options:\n\ show (stream, "4650", &column, &first); fputc ('\n', stream); - fprintf (stream, _("\ --mips32 generate MIPS32 instructions\n")); - fprintf(stream, _("\ -mips16 generate mips16 instructions\n\ -no-mips16 do not generate mips16 instructions\n")); @@ -10441,12 +10232,18 @@ s_mipsset (x) /* Permit the user to change the ISA on the fly. Needless to say, misuse can cause serious problems. */ isa = atoi (name + 4); - if (isa == 0) - mips_opts.isa = file_mips_isa; - else if (isa < 1 || isa > 4) - as_bad (_("unknown ISA level")); - else - mips_opts.isa = isa; + switch (isa) + { + case 0: mips_opts.isa = file_mips_isa; break; + case 1: mips_opts.isa = ISA_MIPS1; break; + case 2: mips_opts.isa = ISA_MIPS2; break; + case 3: mips_opts.isa = ISA_MIPS3; break; + case 4: mips_opts.isa = ISA_MIPS4; break; + case 32: mips_opts.isa = ISA_MIPS32; break; + default: + as_bad (_("unknown ISA level")); + break; + } } else if (strcmp (name, "autoextend") == 0) mips_opts.noautoextend = 0; @@ -12092,3 +11889,179 @@ s_loc (x) symbolP->sy_segment = now_seg; } #endif + +/* CPU name/ISA/number mapping table. + + Entries are grouped by type. The first matching CPU or ISA entry + gets chosen by CPU or ISA, so it should be the 'canonical' name + for that type. Entries after that within the type are sorted + alphabetically. + + Case is ignored in comparison, so put the canonical entry in the + appropriate case but everything else in lower case to ease eye pain. */ +static const struct mips_cpu_info mips_cpu_info_table[] = +{ + /* MIPS1 ISA */ + { "MIPS1", 1, ISA_MIPS1, CPU_R3000, }, + { "mips", 1, ISA_MIPS1, CPU_R3000, }, + + /* MIPS2 ISA */ + { "MIPS2", 1, ISA_MIPS2, CPU_R6000, }, + + /* MIPS3 ISA */ + { "MIPS3", 1, ISA_MIPS3, CPU_R4000, }, + + /* MIPS4 ISA */ + { "MIPS4", 1, ISA_MIPS4, CPU_R8000, }, + + /* MIPS32 ISA */ + { "MIPS32", 1, ISA_MIPS32, CPU_MIPS32, }, + { "Generic-MIPS32", 0, ISA_MIPS32, CPU_MIPS32, }, + + /* XXX for now, MIPS64 -> MIPS3 because of history */ + { "MIPS64", 1, ISA_MIPS3, CPU_R4000 }, /* XXX! */ + + /* R2000 CPU */ + { "R2000", 0, ISA_MIPS1, CPU_R2000, }, + { "2000", 0, ISA_MIPS1, CPU_R2000, }, + { "2k", 0, ISA_MIPS1, CPU_R2000, }, + { "r2k", 0, ISA_MIPS1, CPU_R2000, }, + + /* R3000 CPU */ + { "R3000", 0, ISA_MIPS1, CPU_R3000, }, + { "3000", 0, ISA_MIPS1, CPU_R3000, }, + { "3k", 0, ISA_MIPS1, CPU_R3000, }, + { "r3k", 0, ISA_MIPS1, CPU_R3000, }, + + /* TX3900 CPU */ + { "R3900", 0, ISA_MIPS1, CPU_R3900, }, + { "3900", 0, ISA_MIPS1, CPU_R3900, }, + { "mipstx39", 0, ISA_MIPS1, CPU_R3900, }, + + /* R4000 CPU */ + { "R4000", 0, ISA_MIPS3, CPU_R4000, }, + { "4000", 0, ISA_MIPS3, CPU_R4000, }, + { "4k", 0, ISA_MIPS3, CPU_R4000, }, /* beware */ + { "r4k", 0, ISA_MIPS3, CPU_R4000, }, + + /* R4010 CPU */ + { "R4010", 0, ISA_MIPS2, CPU_R4010, }, + { "4010", 0, ISA_MIPS2, CPU_R4010, }, + + /* R4400 CPU */ + { "R4400", 0, ISA_MIPS3, CPU_R4400, }, + { "4400", 0, ISA_MIPS3, CPU_R4400, }, + + /* R4600 CPU */ + { "R4600", 0, ISA_MIPS3, CPU_R4600, }, + { "4600", 0, ISA_MIPS3, CPU_R4600, }, + { "mips64orion", 0, ISA_MIPS3, CPU_R4600, }, + { "orion", 0, ISA_MIPS3, CPU_R4600, }, + + /* R4650 CPU */ + { "R4650", 0, ISA_MIPS3, CPU_R4650, }, + { "4650", 0, ISA_MIPS3, CPU_R4650, }, + + /* R6000 CPU */ + { "R6000", 0, ISA_MIPS2, CPU_R6000, }, + { "6000", 0, ISA_MIPS2, CPU_R6000, }, + { "6k", 0, ISA_MIPS2, CPU_R6000, }, + { "r6k", 0, ISA_MIPS2, CPU_R6000, }, + + /* R8000 CPU */ + { "R8000", 0, ISA_MIPS4, CPU_R8000, }, + { "8000", 0, ISA_MIPS4, CPU_R8000, }, + { "8k", 0, ISA_MIPS4, CPU_R8000, }, + { "r8k", 0, ISA_MIPS4, CPU_R8000, }, + + /* R10000 CPU */ + { "R10000", 0, ISA_MIPS4, CPU_R10000, }, + { "10000", 0, ISA_MIPS4, CPU_R10000, }, + { "10k", 0, ISA_MIPS4, CPU_R10000, }, + { "r10k", 0, ISA_MIPS4, CPU_R10000, }, + + /* VR4100 CPU */ + { "VR4100", 0, ISA_MIPS3, CPU_VR4100, }, + { "4100", 0, ISA_MIPS3, CPU_VR4100, }, + { "mips64vr4100", 0, ISA_MIPS3, CPU_VR4100, }, + { "r4100", 0, ISA_MIPS3, CPU_VR4100, }, + + /* VR4111 CPU */ + { "VR4111", 0, ISA_MIPS3, CPU_R4111, }, + { "4111", 0, ISA_MIPS3, CPU_R4111, }, + { "mips64vr4111", 0, ISA_MIPS3, CPU_R4111, }, + { "r4111", 0, ISA_MIPS3, CPU_R4111, }, + + /* VR4300 CPU */ + { "VR4300", 0, ISA_MIPS3, CPU_R4300, }, + { "4300", 0, ISA_MIPS3, CPU_R4300, }, + { "mips64vr4300", 0, ISA_MIPS3, CPU_R4300, }, + { "r4300", 0, ISA_MIPS3, CPU_R4300, }, + + /* VR5000 CPU */ + { "VR5000", 0, ISA_MIPS4, CPU_R5000, }, + { "5000", 0, ISA_MIPS4, CPU_R5000, }, + { "5k", 0, ISA_MIPS4, CPU_R5000, }, + { "mips64vr5000", 0, ISA_MIPS4, CPU_R5000, }, + { "r5000", 0, ISA_MIPS4, CPU_R5000, }, + { "r5200", 0, ISA_MIPS4, CPU_R5000, }, + { "r5230", 0, ISA_MIPS4, CPU_R5000, }, + { "r5231", 0, ISA_MIPS4, CPU_R5000, }, + { "r5261", 0, ISA_MIPS4, CPU_R5000, }, + { "r5721", 0, ISA_MIPS4, CPU_R5000, }, + { "r5k", 0, ISA_MIPS4, CPU_R5000, }, + { "r7000", 0, ISA_MIPS4, CPU_R5000, }, + + /* MIPS32 4K CPU */ + { "MIPS32-4K", 0, ISA_MIPS32, CPU_MIPS32_4K, }, + { "4kc", 0, ISA_MIPS32, CPU_MIPS32_4K, }, + { "4km", 0, ISA_MIPS32, CPU_MIPS32_4K, }, + { "4kp", 0, ISA_MIPS32, CPU_MIPS32_4K, }, + { "mips32-4kc", 0, ISA_MIPS32, CPU_MIPS32_4K, }, + { "mips32-4km", 0, ISA_MIPS32, CPU_MIPS32_4K, }, + { "mips32-4kp", 0, ISA_MIPS32, CPU_MIPS32_4K, }, + + /* End marker. */ + { NULL, 0, 0, 0, }, +}; + +static const struct mips_cpu_info * +mips_cpu_info_from_name (name) + const char *name; +{ + int i; + + for (i = 0; mips_cpu_info_table[i].name != NULL; i++) + if (strcasecmp(name, mips_cpu_info_table[i].name) == 0) + return (&mips_cpu_info_table[i]); + + return (NULL); +} + +static const struct mips_cpu_info * +mips_cpu_info_from_isa (isa) + int isa; +{ + int i; + + for (i = 0; mips_cpu_info_table[i].name != NULL; i++) + if (mips_cpu_info_table[i].is_isa + && isa == mips_cpu_info_table[i].isa) + return (&mips_cpu_info_table[i]); + + return (NULL); +} + +static const struct mips_cpu_info * +mips_cpu_info_from_cpu (cpu) + int cpu; +{ + int i; + + for (i = 0; mips_cpu_info_table[i].name != NULL; i++) + if (!mips_cpu_info_table[i].is_isa + && cpu == mips_cpu_info_table[i].cpu) + return (&mips_cpu_info_table[i]); + + return (NULL); +} diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index a45a561f7ed..a59ae1dc0f5 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -276,7 +276,8 @@ Here is a brief summary of how to invoke @code{@value{AS}}. For details, @end ifset @ifset MIPS [ -nocpp ] [ -EL ] [ -EB ] [ -G @var{num} ] [ -mcpu=@var{CPU} ] - [ -mips1 ] [ -mips2 ] [ -mips3 ] [ -m4650 ] [ -no-m4650 ] [ -mips32 ] [ -no-mips32 ] + [ -mips1 ] [ -mips2 ] [ -mips3 ] [ -mips4 ] [ -mips32 ] + [ -m4650 ] [ -no-m4650 ] [ --trap ] [ --break ] [ --emulation=@var{name} ] @end ifset @@ -669,10 +670,12 @@ Generate ``little endian'' format output. @item -mips1 @itemx -mips2 @itemx -mips3 +@itemx -mips4 +@itemx -mips32 Generate code for a particular MIPS Instruction Set Architecture level. @samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors, -@samp{-mips2} to the @sc{r6000} processor, and @samp{-mips3} to the @sc{r4000} -processor. +@samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the @sc{r4000} +processor, @samp{-mips32} to a generic @sc{MIPS32} processor. @item -m4650 @itemx -no-m4650 @@ -681,12 +684,6 @@ the @samp{mad} and @samp{madu} instruction, and to not schedule @samp{nop} instructions around accesses to the @samp{HI} and @samp{LO} registers. @samp{-no-m4650} turns off this option. -@item -mips32 -@itemx -no-mips32 -Generate code for the @sc{MIPS32} architecture. This tells the assembler to -accept ISA level 2 instructions and MIPS32 extensions including some @sc{r4000} -instructions. - @item -mcpu=@var{CPU} Generate code for a particular MIPS cpu. This has little effect on the assembler, but it is passed by @code{@value{GCC}}. diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 137dfe99b18..e56156e4390 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -60,12 +60,14 @@ to select big-endian output, and @samp{-EL} for little-endian. @itemx -mips2 @itemx -mips3 @itemx -mips4 +@itemx -mips32 Generate code for a particular MIPS Instruction Set Architecture level. @samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors, @samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the -@sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and -@sc{r10000} processors. You can also switch instruction sets during the -assembly; see @ref{MIPS ISA,, Directives to override the ISA level}. +@sc{r4000} processor, @samp{-mips4} to the @sc{r8000} and +@sc{r10000} processors, and @samp{-mips32} to a generic @sc(MIPS32) +processor. You can also switch instruction sets during the +assembly; see @ref{MIPS ISA, Directives to override the ISA level}. @item -mgp32 Assume that 32-bit general purpose registers are available. This @@ -140,10 +142,8 @@ rm5721, 6000, rm7000, 8000, -10000 -4Kc -4Km -4Kp +10000, +mips32-4k @end quotation @@ -239,8 +239,8 @@ assembly language programmers! @kindex @code{.set mips@var{n}} @sc{gnu} @code{@value{AS}} supports an additional directive to change the @sc{mips} Instruction Set Architecture level on the fly: @code{.set -mips@var{n}}. @var{n} should be a number from 0 to 4. A value from 1 -to 4 makes the assembler accept instructions for the corresponding +mips@var{n}}. @var{n} should be a number from 0 to 4, or 32. The values 1 +to 4 and 32 make the assembler accept instructions for the corresponding @sc{isa} level, from that point on in the assembly. @code{.set mips@var{n}} affects not only which instructions are permitted, but also how certain macros are expanded. @code{.set mips0} restores the diff --git a/gas/po/gas.pot b/gas/po/gas.pot index 24f3cc4e343..a7f0c5a9429 100644 --- a/gas/po/gas.pot +++ b/gas/po/gas.pot @@ -6,7 +6,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" -"POT-Creation-Date: 2000-12-01 10:13-0800\n" +"POT-Creation-Date: 2000-12-01 13:21-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -979,8 +979,8 @@ msgid "Unknown segment type" msgstr "" #. Probably a memory allocation problem? Give up now. -#: config/tc-a29k.c:330 config/tc-hppa.c:1412 config/tc-mips.c:1107 -#: config/tc-mips.c:1149 config/tc-sparc.c:846 +#: config/tc-a29k.c:330 config/tc-hppa.c:1412 config/tc-mips.c:1026 +#: config/tc-mips.c:1068 config/tc-sparc.c:846 msgid "Broken assembler. No assembly attempted." msgstr "" @@ -1104,7 +1104,7 @@ msgstr "" msgid "type %d reloc done?\n" msgstr "" -#: config/tc-alpha.c:1379 config/tc-alpha.c:1386 config/tc-mips.c:7422 +#: config/tc-alpha.c:1379 config/tc-alpha.c:1386 config/tc-mips.c:7351 msgid "Used $at without \".set noat\"" msgstr "" @@ -1460,7 +1460,7 @@ msgid "invalid symbol to rename to" msgstr "" #: config/tc-arc.c:1009 config/tc-avr.c:372 config/tc-d10v.c:291 -#: config/tc-d30v.c:366 config/tc-mips.c:8850 config/tc-mn10200.c:375 +#: config/tc-d30v.c:366 config/tc-mips.c:8783 config/tc-mn10200.c:375 #: config/tc-pj.c:356 config/tc-ppc.c:4511 config/tc-sh.c:2058 #: config/tc-v850.c:1291 msgid "bad call to md_atof" @@ -1477,8 +1477,8 @@ msgstr "" #: config/tc-arc.c:1325 config/tc-arm.c:4570 config/tc-avr.c:852 #: config/tc-cris.c:2733 config/tc-d10v.c:1538 config/tc-d30v.c:1865 -#: config/tc-mips.c:3293 config/tc-mips.c:4225 config/tc-mips.c:5010 -#: config/tc-mips.c:5556 config/tc-ppc.c:4847 config/tc-v850.c:2385 +#: config/tc-mips.c:3225 config/tc-mips.c:4157 config/tc-mips.c:4942 +#: config/tc-mips.c:5488 config/tc-ppc.c:4847 config/tc-v850.c:2385 msgid "expression too complex" msgstr "" @@ -1519,7 +1519,7 @@ msgstr "" msgid "Invalid syntax for .req directive." msgstr "" -#: config/tc-arm.c:1506 config/tc-mips.c:10088 read.c:2047 +#: config/tc-arm.c:1506 config/tc-mips.c:9892 read.c:2047 #, c-format msgid "Alignment too large: %d. assumed." msgstr "" @@ -1978,7 +1978,7 @@ msgstr "" msgid "out of range branch" msgstr "" -#: config/tc-arm.c:7096 config/tc-arm.c:7112 config/tc-mips.c:9915 +#: config/tc-arm.c:7096 config/tc-arm.c:7112 config/tc-mips.c:9719 msgid "Branch out of range" msgstr "" @@ -2061,7 +2061,7 @@ msgstr "" msgid "Cannot represent %s relocation in this object file format" msgstr "" -#: config/tc-arm.c:7515 config/tc-mips.c:11428 config/tc-sh.c:3177 +#: config/tc-arm.c:7515 config/tc-mips.c:11238 config/tc-sh.c:3177 #, c-format msgid "Can not represent %s relocation in this object file format" msgstr "" @@ -2830,7 +2830,7 @@ msgstr "" msgid "invalid operands" msgstr "" -#: config/tc-h8300.c:1250 config/tc-h8500.c:1104 config/tc-mips.c:8046 +#: config/tc-h8300.c:1250 config/tc-h8500.c:1104 config/tc-mips.c:7979 #: config/tc-sh.c:1877 config/tc-w65.c:740 config/tc-z8k.c:1205 msgid "unknown opcode" msgstr "" @@ -3694,7 +3694,7 @@ msgstr "" msgid "Unknown temporary pseudo register" msgstr "" -#: config/tc-i860.c:181 config/tc-mips.c:1104 +#: config/tc-i860.c:181 config/tc-mips.c:1023 #, c-format msgid "internal error: can't hash `%s': %s\n" msgstr "" @@ -4051,7 +4051,7 @@ msgid "" " -xdebug\t\t debug dependency violation checker\n" msgstr "" -#: config/tc-ia64.c:6147 config/tc-mips.c:1091 +#: config/tc-ia64.c:6147 config/tc-mips.c:1010 msgid "Could not set architecture and machine" msgstr "" @@ -4578,7 +4578,7 @@ msgstr "" msgid "Can not do %d byte pic relocation" msgstr "" -#: config/tc-m68k.c:919 config/tc-mips.c:11409 +#: config/tc-m68k.c:919 config/tc-mips.c:11219 #, c-format msgid "Cannot make %s relocation PC relative" msgstr "" @@ -5221,327 +5221,327 @@ msgstr "" msgid "Cannot represent relocation type %s" msgstr "" -#: config/tc-mips.c:636 +#: config/tc-mips.c:639 #, c-format msgid "internal Error, line %d, %s" msgstr "" -#: config/tc-mips.c:638 +#: config/tc-mips.c:641 msgid "MIPS internal Error" msgstr "" -#: config/tc-mips.c:903 +#: config/tc-mips.c:923 msgid "-G not supported in this configuration." msgstr "" -#: config/tc-mips.c:1050 +#: config/tc-mips.c:992 msgid "trap exception not supported at ISA 1" msgstr "" -#: config/tc-mips.c:1130 +#: config/tc-mips.c:1049 #, c-format msgid "internal: can't hash `%s': %s" msgstr "" -#: config/tc-mips.c:1138 +#: config/tc-mips.c:1057 #, c-format msgid "internal error: bad mips16 opcode: %s %s\n" msgstr "" -#: config/tc-mips.c:1306 +#: config/tc-mips.c:1225 #, c-format msgid "returned from mips_ip(%s) insn_opcode = 0x%x\n" msgstr "" -#: config/tc-mips.c:1860 config/tc-mips.c:11541 +#: config/tc-mips.c:1779 config/tc-mips.c:11351 msgid "extended instruction in delay slot" msgstr "" -#: config/tc-mips.c:1882 config/tc-mips.c:1889 +#: config/tc-mips.c:1801 config/tc-mips.c:1808 #, c-format msgid "jump to misaligned address (0x%lx)" msgstr "" -#: config/tc-mips.c:2538 config/tc-mips.c:2879 +#: config/tc-mips.c:2457 config/tc-mips.c:2811 msgid "Macro instruction expanded into multiple instructions" msgstr "" -#: config/tc-mips.c:2932 +#: config/tc-mips.c:2864 msgid "unsupported large constant" msgstr "" -#: config/tc-mips.c:2934 +#: config/tc-mips.c:2866 #, c-format msgid "Instruction %s requires absolute expression" msgstr "" -#: config/tc-mips.c:3080 +#: config/tc-mips.c:3012 msgid "Number larger than 32 bits" msgstr "" -#: config/tc-mips.c:3101 +#: config/tc-mips.c:3033 msgid "Number larger than 64 bits" msgstr "" -#: config/tc-mips.c:3367 config/tc-mips.c:3439 config/tc-mips.c:5118 -#: config/tc-mips.c:5169 config/tc-mips.c:5705 config/tc-mips.c:5768 +#: config/tc-mips.c:3299 config/tc-mips.c:3371 config/tc-mips.c:5050 +#: config/tc-mips.c:5101 config/tc-mips.c:5637 config/tc-mips.c:5700 msgid "PIC code offset overflow (max 16 signed bits)" msgstr "" -#: config/tc-mips.c:3678 +#: config/tc-mips.c:3610 #, c-format msgid "Branch %s is always false (nop)" msgstr "" -#: config/tc-mips.c:3683 +#: config/tc-mips.c:3615 #, c-format msgid "Branch likely %s is always false" msgstr "" -#: config/tc-mips.c:3690 config/tc-mips.c:3764 config/tc-mips.c:3867 -#: config/tc-mips.c:3922 config/tc-mips.c:6805 config/tc-mips.c:6814 -#: config/tc-mips.c:6822 config/tc-mips.c:6931 +#: config/tc-mips.c:3622 config/tc-mips.c:3696 config/tc-mips.c:3799 +#: config/tc-mips.c:3854 config/tc-mips.c:6737 config/tc-mips.c:6746 +#: config/tc-mips.c:6754 config/tc-mips.c:6863 msgid "Unsupported large constant" msgstr "" #. result is always true -#: config/tc-mips.c:3726 +#: config/tc-mips.c:3658 #, c-format msgid "Branch %s is always true" msgstr "" -#: config/tc-mips.c:3998 config/tc-mips.c:4105 +#: config/tc-mips.c:3930 config/tc-mips.c:4037 msgid "Divide by zero." msgstr "" -#: config/tc-mips.c:4689 +#: config/tc-mips.c:4621 msgid "MIPS PIC call to register other than $25" msgstr "" -#: config/tc-mips.c:4694 config/tc-mips.c:4806 +#: config/tc-mips.c:4626 config/tc-mips.c:4738 msgid "No .cprestore pseudo-op used in PIC code" msgstr "" -#: config/tc-mips.c:4879 config/tc-mips.c:4968 config/tc-mips.c:5456 -#: config/tc-mips.c:5497 config/tc-mips.c:5515 config/tc-mips.c:6144 +#: config/tc-mips.c:4811 config/tc-mips.c:4900 config/tc-mips.c:5388 +#: config/tc-mips.c:5429 config/tc-mips.c:5447 config/tc-mips.c:6076 msgid "opcode not supported on this processor" msgstr "" -#: config/tc-mips.c:5975 config/tc-mips.c:6699 +#: config/tc-mips.c:5907 config/tc-mips.c:6631 msgid "Macro used $at after \".set noat\"" msgstr "" -#: config/tc-mips.c:6115 config/tc-mips.c:6133 +#: config/tc-mips.c:6047 config/tc-mips.c:6065 msgid "rotate count too large" msgstr "" -#: config/tc-mips.c:6184 +#: config/tc-mips.c:6116 #, c-format msgid "Instruction %s: result is always false" msgstr "" -#: config/tc-mips.c:6353 +#: config/tc-mips.c:6285 #, c-format msgid "Instruction %s: result is always true" msgstr "" -#: config/tc-mips.c:6492 config/tc-mips.c:6519 config/tc-mips.c:6591 -#: config/tc-mips.c:6616 +#: config/tc-mips.c:6424 config/tc-mips.c:6451 config/tc-mips.c:6523 +#: config/tc-mips.c:6548 msgid "operand overflow" msgstr "" #. FIXME: Check if this is one of the itbl macros, since they #. are added dynamically. -#: config/tc-mips.c:6695 +#: config/tc-mips.c:6627 #, c-format msgid "Macro %s not implemented yet" msgstr "" -#: config/tc-mips.c:6965 +#: config/tc-mips.c:6897 #, c-format msgid "internal: bad mips opcode (mask error): %s %s" msgstr "" -#: config/tc-mips.c:7019 +#: config/tc-mips.c:6953 #, c-format msgid "internal: bad mips opcode (unknown operand type `%c'): %s %s" msgstr "" -#: config/tc-mips.c:7026 +#: config/tc-mips.c:6960 #, c-format msgid "internal: bad mips opcode (bits 0x%lx undefined): %s %s" msgstr "" -#: config/tc-mips.c:7134 +#: config/tc-mips.c:7068 #, c-format -msgid "opcode not supported on this processor: %s (MIPS%d)" +msgid "opcode not supported on this processor: %s (%s)" msgstr "" -#: config/tc-mips.c:7204 +#: config/tc-mips.c:7139 #, c-format msgid "Improper shift amount (%ld)" msgstr "" -#: config/tc-mips.c:7230 config/tc-mips.c:8386 config/tc-mips.c:8501 +#: config/tc-mips.c:7165 config/tc-mips.c:8319 config/tc-mips.c:8434 #, c-format msgid "Invalid value for `%s' (%lu)" msgstr "" -#: config/tc-mips.c:7248 config/tc-mips.c:7278 +#: config/tc-mips.c:7183 #, c-format msgid "Illegal break code (%ld)" msgstr "" -#: config/tc-mips.c:7262 +#: config/tc-mips.c:7197 #, c-format msgid "Illegal lower break code (%ld)" msgstr "" -#: config/tc-mips.c:7293 +#: config/tc-mips.c:7210 #, c-format -msgid "Illegal syscall code (%ld)" +msgid "Illegal 20-bit code (%ld)" msgstr "" -#: config/tc-mips.c:7305 +#: config/tc-mips.c:7222 #, c-format msgid "Coproccesor code > 25 bits (%ld)" msgstr "" -#: config/tc-mips.c:7319 +#: config/tc-mips.c:7235 +#, c-format +msgid "Illegal 19-bit code (%ld)" +msgstr "" + +#: config/tc-mips.c:7247 #, c-format msgid "Invalidate performance regster (%ld)" msgstr "" -#: config/tc-mips.c:7355 +#: config/tc-mips.c:7284 #, c-format msgid "Invalid register number (%d)" msgstr "" -#: config/tc-mips.c:7515 +#: config/tc-mips.c:7448 #, c-format msgid "Invalid float register number (%d)" msgstr "" -#: config/tc-mips.c:7525 +#: config/tc-mips.c:7458 #, c-format msgid "Float register should be even, was %d" msgstr "" -#: config/tc-mips.c:7576 +#: config/tc-mips.c:7509 msgid "absolute expression required" msgstr "" -#: config/tc-mips.c:7637 +#: config/tc-mips.c:7570 #, c-format msgid "Bad floating point constant: %s" msgstr "" -#: config/tc-mips.c:7759 +#: config/tc-mips.c:7692 msgid "Can't use floating point insn in this section" msgstr "" -#: config/tc-mips.c:7813 +#: config/tc-mips.c:7746 msgid "16 bit expression not in range 0..65535" msgstr "" -#: config/tc-mips.c:7850 +#: config/tc-mips.c:7783 msgid "16 bit expression not in range -32768..32767" msgstr "" -#: config/tc-mips.c:7921 +#: config/tc-mips.c:7854 msgid "lui expression not in range 0..65535" msgstr "" -#: config/tc-mips.c:7945 +#: config/tc-mips.c:7878 #, c-format msgid "invalid condition code register $fcc%d" msgstr "" -#: config/tc-mips.c:7970 +#: config/tc-mips.c:7903 msgid "invalid coprocessor sub-selection value (0-7)" msgstr "" -#: config/tc-mips.c:7975 +#: config/tc-mips.c:7908 #, c-format msgid "bad char = '%c'\n" msgstr "" -#: config/tc-mips.c:7988 config/tc-mips.c:8526 +#: config/tc-mips.c:7921 config/tc-mips.c:8459 msgid "illegal operands" msgstr "" -#: config/tc-mips.c:8055 +#: config/tc-mips.c:7988 msgid "unrecognized opcode" msgstr "" -#: config/tc-mips.c:8164 +#: config/tc-mips.c:8097 #, c-format msgid "invalid register number (%d)" msgstr "" -#: config/tc-mips.c:8245 +#: config/tc-mips.c:8178 msgid "used $at without \".set noat\"" msgstr "" -#: config/tc-mips.c:8420 +#: config/tc-mips.c:8353 msgid "can't parse register list" msgstr "" -#: config/tc-mips.c:8454 config/tc-mips.c:8484 +#: config/tc-mips.c:8387 config/tc-mips.c:8417 msgid "invalid register list" msgstr "" -#: config/tc-mips.c:8651 +#: config/tc-mips.c:8584 msgid "extended operand requested but not required" msgstr "" -#: config/tc-mips.c:8653 +#: config/tc-mips.c:8586 msgid "invalid unextended operand value" msgstr "" -#: config/tc-mips.c:8681 +#: config/tc-mips.c:8614 msgid "operand value out of range for instruction" msgstr "" -#: config/tc-mips.c:9166 -#, c-format -msgid "ignoring invalid leading 'v' in -mcpu=%s switch" -msgstr "" - -#: config/tc-mips.c:9172 +#: config/tc-mips.c:8987 #, c-format msgid "invalid architecture -mcpu=%s" msgstr "" -#: config/tc-mips.c:9228 +#: config/tc-mips.c:9036 msgid "-G may not be used with embedded PIC code" msgstr "" -#: config/tc-mips.c:9240 +#: config/tc-mips.c:9048 msgid "-call_shared is supported only for ELF format" msgstr "" -#: config/tc-mips.c:9246 config/tc-mips.c:10330 config/tc-mips.c:10498 +#: config/tc-mips.c:9054 config/tc-mips.c:10134 config/tc-mips.c:10308 msgid "-G may not be used with SVR4 PIC code" msgstr "" -#: config/tc-mips.c:9255 +#: config/tc-mips.c:9063 msgid "-non_shared is supported only for ELF format" msgstr "" -#: config/tc-mips.c:9271 +#: config/tc-mips.c:9079 msgid "-G is not supported for this configuration" msgstr "" -#: config/tc-mips.c:9276 +#: config/tc-mips.c:9084 msgid "-G may not be used with SVR4 or embedded PIC code" msgstr "" -#: config/tc-mips.c:9300 +#: config/tc-mips.c:9108 msgid "No compiled in support for 64 bit object file format" msgstr "" -#: config/tc-mips.c:9388 +#: config/tc-mips.c:9196 msgid "" "MIPS options:\n" "-membedded-pic\t\tgenerate embedded position independent code\n" @@ -5552,33 +5552,30 @@ msgid "" "\t\t\timplicitly with the gp register [default 8]\n" msgstr "" -#: config/tc-mips.c:9396 +#: config/tc-mips.c:9204 msgid "" "-mips1\t\t\tgenerate MIPS ISA I instructions\n" "-mips2\t\t\tgenerate MIPS ISA II instructions\n" "-mips3\t\t\tgenerate MIPS ISA III instructions\n" "-mips4\t\t\tgenerate MIPS ISA IV instructions\n" +"-mips32 generate MIPS32 ISA instructions\n" "-mcpu=CPU\t\tgenerate code for CPU, where CPU is one of:\n" msgstr "" -#: config/tc-mips.c:9425 +#: config/tc-mips.c:9232 msgid "" "-mCPU\t\t\tequivalent to -mcpu=CPU.\n" "-no-mCPU\t\tdon't generate code specific to CPU.\n" "\t\t\tFor -mCPU and -no-mCPU, CPU must be one of:\n" msgstr "" -#: config/tc-mips.c:9438 -msgid "-mips32 generate MIPS32 instructions\n" -msgstr "" - -#: config/tc-mips.c:9441 +#: config/tc-mips.c:9245 msgid "" "-mips16\t\t\tgenerate mips16 instructions\n" "-no-mips16\t\tdo not generate mips16 instructions\n" msgstr "" -#: config/tc-mips.c:9444 +#: config/tc-mips.c:9248 msgid "" "-O0\t\t\tremove unneeded NOPs, do not swap branches\n" "-O\t\t\tremove unneeded NOPs and swap branches\n" @@ -5587,7 +5584,7 @@ msgid "" "--break, --no-trap\tbreak exception on div by 0 and mult overflow\n" msgstr "" -#: config/tc-mips.c:9451 +#: config/tc-mips.c:9255 msgid "" "-KPIC, -call_shared\tgenerate SVR4 position independent code\n" "-non_shared\t\tdo not generate position independent code\n" @@ -5596,170 +5593,170 @@ msgid "" "-64\t\t\tcreate 64 bit object file\n" msgstr "" -#: config/tc-mips.c:9508 +#: config/tc-mips.c:9312 #, c-format msgid "Unsupported reloc size %d" msgstr "" -#: config/tc-mips.c:9611 +#: config/tc-mips.c:9415 msgid "Unmatched %%hi reloc" msgstr "" -#: config/tc-mips.c:9735 +#: config/tc-mips.c:9539 msgid "Invalid PC relative reloc" msgstr "" -#: config/tc-mips.c:9845 config/tc-sparc.c:3101 config/tc-sparc.c:3108 +#: config/tc-mips.c:9649 config/tc-sparc.c:3101 config/tc-sparc.c:3108 #: config/tc-sparc.c:3115 config/tc-sparc.c:3122 config/tc-sparc.c:3129 #: config/tc-sparc.c:3138 config/tc-sparc.c:3149 config/tc-sparc.c:3175 #: config/tc-sparc.c:3203 write.c:984 write.c:1048 msgid "relocation overflow" msgstr "" -#: config/tc-mips.c:9861 +#: config/tc-mips.c:9665 #, c-format msgid "Branch to odd address (%lx)" msgstr "" -#: config/tc-mips.c:10025 +#: config/tc-mips.c:9829 #, c-format msgid "%08lx UNDEFINED\n" msgstr "" -#: config/tc-mips.c:10091 +#: config/tc-mips.c:9895 msgid "Alignment negative: 0 assumed." msgstr "" -#: config/tc-mips.c:10179 +#: config/tc-mips.c:9983 msgid "No read only data section in this object file format" msgstr "" -#: config/tc-mips.c:10202 +#: config/tc-mips.c:10006 msgid "Global pointers not supported; recompile -G 0" msgstr "" -#: config/tc-mips.c:10288 +#: config/tc-mips.c:10092 #, c-format msgid "%s: no such section" msgstr "" -#: config/tc-mips.c:10325 +#: config/tc-mips.c:10129 #, c-format msgid ".option pic%d not supported" msgstr "" -#: config/tc-mips.c:10336 +#: config/tc-mips.c:10140 #, c-format msgid "Unrecognized option \"%s\"" msgstr "" -#: config/tc-mips.c:10399 +#: config/tc-mips.c:10203 msgid "`noreorder' must be set before `nomacro'" msgstr "" -#: config/tc-mips.c:10434 +#: config/tc-mips.c:10244 msgid "unknown ISA level" msgstr "" -#: config/tc-mips.c:10457 +#: config/tc-mips.c:10267 msgid ".set pop with no .set push" msgstr "" -#: config/tc-mips.c:10481 +#: config/tc-mips.c:10291 #, c-format msgid "Tried to set unrecognized symbol: %s\n" msgstr "" -#: config/tc-mips.c:10531 +#: config/tc-mips.c:10341 msgid ".cpload not in noreorder section" msgstr "" -#: config/tc-mips.c:10613 +#: config/tc-mips.c:10423 msgid "Unsupported use of .gpword" msgstr "" -#: config/tc-mips.c:10750 +#: config/tc-mips.c:10560 msgid "expected `$'" msgstr "" -#: config/tc-mips.c:10758 +#: config/tc-mips.c:10568 msgid "Bad register number" msgstr "" -#: config/tc-mips.c:10774 +#: config/tc-mips.c:10584 msgid "Unrecognized register name" msgstr "" -#: config/tc-mips.c:10973 +#: config/tc-mips.c:10783 msgid "unsupported PC relative reference to different section" msgstr "" -#: config/tc-mips.c:11082 +#: config/tc-mips.c:10892 msgid "unsupported relocation" msgstr "" -#: config/tc-mips.c:11187 +#: config/tc-mips.c:10997 msgid "AT used after \".set noat\" or macro used after \".set nomacro\"" msgstr "" -#: config/tc-mips.c:11250 +#: config/tc-mips.c:11060 msgid "Double check fx_r_type in tc-mips.c:tc_gen_reloc" msgstr "" -#: config/tc-mips.c:11762 +#: config/tc-mips.c:11572 msgid "missing `.end' at end of assembly" msgstr "" -#: config/tc-mips.c:11777 +#: config/tc-mips.c:11587 msgid "Expected simple number." msgstr "" -#: config/tc-mips.c:11803 +#: config/tc-mips.c:11613 #, c-format msgid " *input_line_pointer == '%c' 0x%02x\n" msgstr "" -#: config/tc-mips.c:11805 +#: config/tc-mips.c:11615 msgid "Invalid number" msgstr "" -#: config/tc-mips.c:11859 +#: config/tc-mips.c:11669 msgid ".end not in text section" msgstr "" -#: config/tc-mips.c:11863 +#: config/tc-mips.c:11673 msgid ".end directive without a preceding .ent directive." msgstr "" -#: config/tc-mips.c:11872 +#: config/tc-mips.c:11682 msgid ".end symbol does not match .ent symbol." msgstr "" -#: config/tc-mips.c:11875 +#: config/tc-mips.c:11685 msgid ".end directive missing or unknown symbol" msgstr "" -#: config/tc-mips.c:11950 +#: config/tc-mips.c:11760 msgid ".ent or .aent not in text section." msgstr "" -#: config/tc-mips.c:11953 +#: config/tc-mips.c:11763 msgid "missing `.end'" msgstr "" -#: config/tc-mips.c:11986 ecoff.c:3205 +#: config/tc-mips.c:11796 ecoff.c:3205 msgid ".frame outside of .ent" msgstr "" -#: config/tc-mips.c:11997 ecoff.c:3216 +#: config/tc-mips.c:11807 ecoff.c:3216 msgid "Bad .frame directive" msgstr "" -#: config/tc-mips.c:12027 +#: config/tc-mips.c:11837 msgid ".mask/.fmask outside of .ent" msgstr "" -#: config/tc-mips.c:12034 +#: config/tc-mips.c:11844 msgid "Bad .mask/.fmask directive" msgstr "" diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 363c8f54f5d..a7deff8c902 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -88,6 +88,7 @@ if [istarget mips*-*-*] then { run_dump_test "mips4100" run_dump_test "lineno" run_dump_test "sync" + run_dump_test "mips32" # Make sure that -mcpu=FOO and -mFOO are equivalent. Assemble a file # containing 4650-specific instructions with -m4650 and -mcpu=4650, diff --git a/gas/testsuite/gas/mips/mips32.d b/gas/testsuite/gas/mips/mips32.d new file mode 100644 index 00000000000..5573e9d820f --- /dev/null +++ b/gas/testsuite/gas/mips/mips32.d @@ -0,0 +1,49 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS MIPS32 instructions +#as: -mips32 + +# Check MIPS32 instruction assembly + +.*: +file format elf.*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> 70410821 clo \$at,\$v0 +0+0004 <[^>]*> 70831820 clz \$v1,\$a0 +0+0008 <[^>]*> 70a60000 mad \$a1,\$a2 +0+000c <[^>]*> 70e80001 madu \$a3,\$t0 +0+0010 <[^>]*> 712a0004 msub \$t1,\$t2 +0+0014 <[^>]*> 716c0005 msubu \$t3,\$t4 +0+0018 <[^>]*> 71cf6802 mul \$t5,\$t6,\$t7 +0+001c <[^>]*> ce040000 pref 0x4,0\(\$s0\) +0+0020 <[^>]*> ce247fff pref 0x4,32767\(\$s1\) +0+0024 <[^>]*> ce448000 pref 0x4,-32768\(\$s2\) +0+0028 <[^>]*> 00000040 ssnop +0+002c <[^>]*> 4900fff4 bc2f 0+0000 <text_label> +0+0030 <[^>]*> 00000000 nop +0+0034 <[^>]*> 4902fff2 bc2fl 0+0000 <text_label> +0+0038 <[^>]*> 00000000 nop +0+003c <[^>]*> 4901fff0 bc2t 0+0000 <text_label> +0+0040 <[^>]*> 00000000 nop +0+0044 <[^>]*> 4903ffee bc2tl 0+0000 <text_label> +0+0048 <[^>]*> 00000000 nop +0+004c <[^>]*> 48411000 cfc2 \$at,\$2 +0+0050 <[^>]*> 4b234567 c2 0x1234567 +0+0054 <[^>]*> 48c21800 ctc2 \$v0,\$3 +0+0058 <[^>]*> 48032000 mfc2 \$v1,\$4 +0+005c <[^>]*> 48042800 mfc2 \$a0,\$5 +0+0060 <[^>]*> 48053007 mfc2 \$a1,\$6,7 +0+0064 <[^>]*> 48863800 mtc2 \$a2,\$7 +0+0068 <[^>]*> 48874000 mtc2 \$a3,\$8 +0+006c <[^>]*> 48884807 mtc2 \$t0,\$9,7 +0+0070 <[^>]*> bc250000 cache 0x5,0\(\$at\) +0+0074 <[^>]*> bc457fff cache 0x5,32767\(\$v0\) +0+0078 <[^>]*> bc658000 cache 0x5,-32768\(\$v1\) +0+007c <[^>]*> 42000018 eret +0+0080 <[^>]*> 42000008 tlbp +0+0084 <[^>]*> 42000001 tlbr +0+0088 <[^>]*> 42000002 tlbwi +0+008c <[^>]*> 42000006 tlbwr +0+0090 <[^>]*> 42000020 wait +0+0094 <[^>]*> 42000020 wait +0+0098 <[^>]*> 4359e260 wait 0x56789 +0+009c <[^>]*> 00000000 nop diff --git a/gas/testsuite/gas/mips/mips32.s b/gas/testsuite/gas/mips/mips32.s new file mode 100644 index 00000000000..240909aee24 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32.s @@ -0,0 +1,63 @@ +# source file to test assembly of mips32 instructions + + .set noreorder + .set noat + + .globl text_label .text +text_label: + + # unprivileged CPU instructions + + clo $1, $2 + clz $3, $4 + madd $5, $6 # disassembles as mad ... + maddu $7, $8 # disassembles as madu ... + msub $9, $10 + msubu $11, $12 + mul $13, $14, $15 + pref 4, ($16) + pref 4, 32767($17) + pref 4, -32768($18) + ssnop + + + # unprivileged coprocessor instructions. + # these tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes. + + bc2f text_label + nop + bc2fl text_label + nop + bc2t text_label + nop + bc2tl text_label + nop + # XXX other BCzCond encodings not currently expressable + cfc2 $1, $2 + cop2 0x1234567 # disassembles as c2 ... + ctc2 $2, $3 + mfc2 $3, $4 + mfc2 $4, $5, 0 # disassembles without sel + mfc2 $5, $6, 7 + mtc2 $6, $7 + mtc2 $7, $8, 0 # disassembles without sel + mtc2 $8, $9, 7 + + + # privileged instructions + + cache 5, ($1) + cache 5, 32767($2) + cache 5, -32768($3) + eret + tlbp + tlbr + tlbwi + tlbwr + wait + wait 0 # disassembles without code + wait 0x56789 + + # padding to a cache line boundary so it's more likely to + # pass everywhere + nop diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index aa2d4e0181b..a1ef8852a54 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,9 @@ +2000-10-16 Chris Demetriou <cgd@sibyte.com> + + * mips.h (E_MIPS_ARCH_32): New constant. + (E_MIPS_MACH_MIPS32, E_MIPS_MACH_MIPS32_4K): Replace the + former with the latter. + 2000-11-30 Jan Hubicka <jh@suse.cz> * common.h (EM_X86_64): New macro. diff --git a/include/elf/mips.h b/include/elf/mips.h index 18185e7dfe6..41f52cd04ac 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -121,6 +121,9 @@ END_RELOC_NUMBERS (R_MIPS_maxext) /* -mips4 code. */ #define E_MIPS_ARCH_4 0x30000000 +/* -mips32 code. */ +#define E_MIPS_ARCH_32 0x50000000 + /* The ABI of the file. Also see EF_MIPS_ABI2 above. */ #define EF_MIPS_ABI 0x0000F000 @@ -153,9 +156,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext) #define E_MIPS_MACH_4100 0x00830000 #define E_MIPS_MACH_4650 0x00850000 #define E_MIPS_MACH_4111 0x00880000 -/* -mips32 code. - It is easier to treat MIPS32 as a machine rather than an architecture. */ -#define E_MIPS_MACH_MIPS32 0x00890000 +#define E_MIPS_MACH_MIPS32_4K 0x00890000 /* Processor specific section indices. These sections do not actually exist. Symbols with a st_shndx field corresponding to one of these diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 902544a76ee..ceb0317c9d6 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -8,6 +8,23 @@ (MIPS operand specifier comments): Remove 'm', add 'U' and 'J', and update the meaning of 'B' so that it's more general. + * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, + INSN_ISA5): Renumber, redefine to mean the ISA at which the + instruction was added. + (INSN_ISA32): New constant. + (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32): + Renumber to avoid new and/or renumbered INSN_* constants. + (INSN_MIPS32): Delete. + (ISA_UNKNOWN): New constant to indicate unknown ISA. + (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5, + ISA_MIPS32): New constants, defined to be the mask of INSN_* + constants available at that ISA level. + (CPU_UNKNOWN): New constant to indicate unknown CPU. + (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter, + define it with a unique value. + (OPCODE_IS_MEMBER): Update for new ISA membership-related + constant meanings. + 2000-10-20 Jakub Jelinek <jakub@redhat.com> * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 61931f6c012..7eaba30087e 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -302,41 +302,43 @@ struct mips_opcode disassembler, and requires special treatment by the assembler. */ #define INSN_MACRO 0xffffffff - - - - -/* MIPS ISA field--CPU level at which insn is supported. */ -#define INSN_ISA 0x0000000F -/* An instruction which is not part of any basic MIPS ISA. - (ie it is a chip specific instruction) */ -#define INSN_NO_ISA 0x00000000 -/* MIPS ISA 1 instruction. */ -#define INSN_ISA1 0x00000001 -/* MIPS ISA 2 instruction (R6000 or R4000). */ -#define INSN_ISA2 0x00000002 -/* MIPS ISA 3 instruction (R4000). */ -#define INSN_ISA3 0x00000003 -/* MIPS ISA 4 instruction (R8000). */ -#define INSN_ISA4 0x00000004 -#define INSN_ISA5 0x00000005 +/* Masks used to mark instructions to indicate which MIPS ISA level + they were introduced in. ISAs, as defined below, are logical + ORs of these bits, indicatingthat they support the instructions + defined at the given level. */ + +#define INSN_ISA1 0x00000010 +#define INSN_ISA2 0x00000020 +#define INSN_ISA3 0x00000040 +#define INSN_ISA4 0x00000080 +#define INSN_ISA5 0x00000100 +#define INSN_ISA32 0x00000200 /* Chip specific instructions. These are bitmasks. */ + /* MIPS R4650 instruction. */ -#define INSN_4650 0x00000010 +#define INSN_4650 0x00010000 /* LSI R4010 instruction. */ -#define INSN_4010 0x00000020 -/* NEC VR4100 instruction. */ -#define INSN_4100 0x00000040 +#define INSN_4010 0x00020000 +/* NEC VR4100 instruction. */ +#define INSN_4100 0x00040000 /* Toshiba R3900 instruction. */ -#define INSN_3900 0x00000080 -/* MIPS32 instruction (4Kc, 4Km, 4Kp). */ -#define INSN_MIPS32 0x00000100 -/* 32-bit code running on a ISA3+ CPU. */ -#define INSN_GP32 0x00001000 +#define INSN_3900 0x00080000 +/* 32-bit code running on a ISA3+ CPU. */ +#define INSN_GP32 0x00100000 + +/* MIPS ISA defines, use instead of hardcoding ISA level. */ + +#define ISA_UNKNOWN 0 /* Gas internal use. */ +#define ISA_MIPS1 (INSN_ISA1) +#define ISA_MIPS2 (ISA_MIPS1 | INSN_ISA2) +#define ISA_MIPS3 (ISA_MIPS2 | INSN_ISA3) +#define ISA_MIPS4 (ISA_MIPS3 | INSN_ISA4) +#define ISA_MIPS32 (ISA_MIPS2 | INSN_ISA32) /* CPU defines, use instead of hardcoding processor number. Keep this in sync with bfd/archures.c in order for machine selection to work. */ +#define CPU_UNKNOWN 0 /* Gas internal use. */ #define CPU_R2000 2000 #define CPU_R3000 3000 #define CPU_R3900 3900 @@ -354,7 +356,7 @@ struct mips_opcode #define CPU_R10000 10000 #define CPU_MIPS16 16 #define CPU_MIPS32 32 -#define CPU_4K CPU_MIPS32 +#define CPU_MIPS32_4K 3204113 /* 32, 04, octal 'K' */ /* Test for membership in an ISA including chip specific ISAs. INSN is pointer to an element of the opcode table; ISA is the @@ -365,236 +367,235 @@ struct mips_opcode in the MIPS gas docs. */ #define OPCODE_IS_MEMBER(insn, isa, cpu, gp32) \ - ((((insn)->membership & INSN_ISA) != 0 \ - && ((insn)->membership & INSN_ISA) <= (unsigned) isa \ + ((((insn)->membership & isa) != 0 \ && ((insn)->membership & INSN_GP32 ? gp32 : 1)) \ || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \ || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \ || ((cpu == CPU_VR4100 || cpu == CPU_R4111) \ && ((insn)->membership & INSN_4100) != 0) \ - || (cpu == CPU_MIPS32 && ((insn)->membership & INSN_MIPS32) != 0) \ || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0)) /* This is a list of macro expanded instructions. - * - * _I appended means immediate - * _A appended means address - * _AB appended means address with base register - * _D appended means 64 bit floating point constant - * _S appended means 32 bit floating point constant - */ -enum { - M_ABS, - M_ADD_I, - M_ADDU_I, - M_AND_I, - M_BEQ, - M_BEQ_I, - M_BEQL_I, - M_BGE, - M_BGEL, - M_BGE_I, - M_BGEL_I, - M_BGEU, - M_BGEUL, - M_BGEU_I, - M_BGEUL_I, - M_BGT, - M_BGTL, - M_BGT_I, - M_BGTL_I, - M_BGTU, - M_BGTUL, - M_BGTU_I, - M_BGTUL_I, - M_BLE, - M_BLEL, - M_BLE_I, - M_BLEL_I, - M_BLEU, - M_BLEUL, - M_BLEU_I, - M_BLEUL_I, - M_BLT, - M_BLTL, - M_BLT_I, - M_BLTL_I, - M_BLTU, - M_BLTUL, - M_BLTU_I, - M_BLTUL_I, - M_BNE, - M_BNE_I, - M_BNEL_I, - M_DABS, - M_DADD_I, - M_DADDU_I, - M_DDIV_3, - M_DDIV_3I, - M_DDIVU_3, - M_DDIVU_3I, - M_DIV_3, - M_DIV_3I, - M_DIVU_3, - M_DIVU_3I, - M_DLA_AB, - M_DLI, - M_DMUL, - M_DMUL_I, - M_DMULO, - M_DMULO_I, - M_DMULOU, - M_DMULOU_I, - M_DREM_3, - M_DREM_3I, - M_DREMU_3, - M_DREMU_3I, - M_DSUB_I, - M_DSUBU_I, - M_DSUBU_I_2, - M_J_A, - M_JAL_1, - M_JAL_2, - M_JAL_A, - M_L_DOB, - M_L_DAB, - M_LA_AB, - M_LB_A, - M_LB_AB, - M_LBU_A, - M_LBU_AB, - M_LD_A, - M_LD_OB, - M_LD_AB, - M_LDC1_AB, - M_LDC2_AB, - M_LDC3_AB, - M_LDL_AB, - M_LDR_AB, - M_LH_A, - M_LH_AB, - M_LHU_A, - M_LHU_AB, - M_LI, - M_LI_D, - M_LI_DD, - M_LI_S, - M_LI_SS, - M_LL_AB, - M_LLD_AB, - M_LS_A, - M_LW_A, - M_LW_AB, - M_LWC0_A, - M_LWC0_AB, - M_LWC1_A, - M_LWC1_AB, - M_LWC2_A, - M_LWC2_AB, - M_LWC3_A, - M_LWC3_AB, - M_LWL_A, - M_LWL_AB, - M_LWR_A, - M_LWR_AB, - M_LWU_AB, - M_MUL, - M_MUL_I, - M_MULO, - M_MULO_I, - M_MULOU, - M_MULOU_I, - M_NOR_I, - M_OR_I, - M_REM_3, - M_REM_3I, - M_REMU_3, - M_REMU_3I, - M_ROL, - M_ROL_I, - M_ROR, - M_ROR_I, - M_S_DA, - M_S_DOB, - M_S_DAB, - M_S_S, - M_SC_AB, - M_SCD_AB, - M_SD_A, - M_SD_OB, - M_SD_AB, - M_SDC1_AB, - M_SDC2_AB, - M_SDC3_AB, - M_SDL_AB, - M_SDR_AB, - M_SEQ, - M_SEQ_I, - M_SGE, - M_SGE_I, - M_SGEU, - M_SGEU_I, - M_SGT, - M_SGT_I, - M_SGTU, - M_SGTU_I, - M_SLE, - M_SLE_I, - M_SLEU, - M_SLEU_I, - M_SLT_I, - M_SLTU_I, - M_SNE, - M_SNE_I, - M_SB_A, - M_SB_AB, - M_SH_A, - M_SH_AB, - M_SW_A, - M_SW_AB, - M_SWC0_A, - M_SWC0_AB, - M_SWC1_A, - M_SWC1_AB, - M_SWC2_A, - M_SWC2_AB, - M_SWC3_A, - M_SWC3_AB, - M_SWL_A, - M_SWL_AB, - M_SWR_A, - M_SWR_AB, - M_SUB_I, - M_SUBU_I, - M_SUBU_I_2, - M_TEQ_I, - M_TGE_I, - M_TGEU_I, - M_TLT_I, - M_TLTU_I, - M_TNE_I, - M_TRUNCWD, - M_TRUNCWS, - M_ULD, - M_ULD_A, - M_ULH, - M_ULH_A, - M_ULHU, - M_ULHU_A, - M_ULW, - M_ULW_A, - M_USH, - M_USH_A, - M_USW, - M_USW_A, - M_USD, - M_USD_A, - M_XOR_I, - M_COP0, - M_COP1, - M_COP2, - M_COP3, - M_NUM_MACROS + + _I appended means immediate + _A appended means address + _AB appended means address with base register + _D appended means 64 bit floating point constant + _S appended means 32 bit floating point constant. */ + +enum +{ + M_ABS, + M_ADD_I, + M_ADDU_I, + M_AND_I, + M_BEQ, + M_BEQ_I, + M_BEQL_I, + M_BGE, + M_BGEL, + M_BGE_I, + M_BGEL_I, + M_BGEU, + M_BGEUL, + M_BGEU_I, + M_BGEUL_I, + M_BGT, + M_BGTL, + M_BGT_I, + M_BGTL_I, + M_BGTU, + M_BGTUL, + M_BGTU_I, + M_BGTUL_I, + M_BLE, + M_BLEL, + M_BLE_I, + M_BLEL_I, + M_BLEU, + M_BLEUL, + M_BLEU_I, + M_BLEUL_I, + M_BLT, + M_BLTL, + M_BLT_I, + M_BLTL_I, + M_BLTU, + M_BLTUL, + M_BLTU_I, + M_BLTUL_I, + M_BNE, + M_BNE_I, + M_BNEL_I, + M_DABS, + M_DADD_I, + M_DADDU_I, + M_DDIV_3, + M_DDIV_3I, + M_DDIVU_3, + M_DDIVU_3I, + M_DIV_3, + M_DIV_3I, + M_DIVU_3, + M_DIVU_3I, + M_DLA_AB, + M_DLI, + M_DMUL, + M_DMUL_I, + M_DMULO, + M_DMULO_I, + M_DMULOU, + M_DMULOU_I, + M_DREM_3, + M_DREM_3I, + M_DREMU_3, + M_DREMU_3I, + M_DSUB_I, + M_DSUBU_I, + M_DSUBU_I_2, + M_J_A, + M_JAL_1, + M_JAL_2, + M_JAL_A, + M_L_DOB, + M_L_DAB, + M_LA_AB, + M_LB_A, + M_LB_AB, + M_LBU_A, + M_LBU_AB, + M_LD_A, + M_LD_OB, + M_LD_AB, + M_LDC1_AB, + M_LDC2_AB, + M_LDC3_AB, + M_LDL_AB, + M_LDR_AB, + M_LH_A, + M_LH_AB, + M_LHU_A, + M_LHU_AB, + M_LI, + M_LI_D, + M_LI_DD, + M_LI_S, + M_LI_SS, + M_LL_AB, + M_LLD_AB, + M_LS_A, + M_LW_A, + M_LW_AB, + M_LWC0_A, + M_LWC0_AB, + M_LWC1_A, + M_LWC1_AB, + M_LWC2_A, + M_LWC2_AB, + M_LWC3_A, + M_LWC3_AB, + M_LWL_A, + M_LWL_AB, + M_LWR_A, + M_LWR_AB, + M_LWU_AB, + M_MUL, + M_MUL_I, + M_MULO, + M_MULO_I, + M_MULOU, + M_MULOU_I, + M_NOR_I, + M_OR_I, + M_REM_3, + M_REM_3I, + M_REMU_3, + M_REMU_3I, + M_ROL, + M_ROL_I, + M_ROR, + M_ROR_I, + M_S_DA, + M_S_DOB, + M_S_DAB, + M_S_S, + M_SC_AB, + M_SCD_AB, + M_SD_A, + M_SD_OB, + M_SD_AB, + M_SDC1_AB, + M_SDC2_AB, + M_SDC3_AB, + M_SDL_AB, + M_SDR_AB, + M_SEQ, + M_SEQ_I, + M_SGE, + M_SGE_I, + M_SGEU, + M_SGEU_I, + M_SGT, + M_SGT_I, + M_SGTU, + M_SGTU_I, + M_SLE, + M_SLE_I, + M_SLEU, + M_SLEU_I, + M_SLT_I, + M_SLTU_I, + M_SNE, + M_SNE_I, + M_SB_A, + M_SB_AB, + M_SH_A, + M_SH_AB, + M_SW_A, + M_SW_AB, + M_SWC0_A, + M_SWC0_AB, + M_SWC1_A, + M_SWC1_AB, + M_SWC2_A, + M_SWC2_AB, + M_SWC3_A, + M_SWC3_AB, + M_SWL_A, + M_SWL_AB, + M_SWR_A, + M_SWR_AB, + M_SUB_I, + M_SUBU_I, + M_SUBU_I_2, + M_TEQ_I, + M_TGE_I, + M_TGEU_I, + M_TLT_I, + M_TLTU_I, + M_TNE_I, + M_TRUNCWD, + M_TRUNCWS, + M_ULD, + M_ULD_A, + M_ULH, + M_ULH_A, + M_ULHU, + M_ULHU_A, + M_ULW, + M_ULW_A, + M_USH, + M_USH_A, + M_USW, + M_USW_A, + M_USD, + M_USD_A, + M_XOR_I, + M_COP0, + M_COP1, + M_COP2, + M_COP3, + M_NUM_MACROS }; diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 6bac17d7b45..a03baa3eca3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -17,6 +17,14 @@ MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32 "wait" variant which uses 'J' operand specifier. + * mips-dis.c (set_mips_isa_type): Update to use + CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case. + Replace bfd_mach_mips4K with bfd_mach_mips32_4k case. + * mips-opc.c (I32): New constant for instructions added in + MIPS32. + (P4): Delete. + (mips_builtin_opcodes) Replace all uses of P4 with I32. + 2000-11-28 Hans-Peter Nilsson <hp@bitrange.com> * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned. diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 39bcf336c71..bb970ef5483 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -287,8 +287,8 @@ set_mips_isa_type (mach, isa, cputype) int *isa; int *cputype; { - int target_processor = 0; - int mips_isa = 0; + int target_processor = CPU_UNKNOWN; + int mips_isa = ISA_UNKNOWN; /* Use standard MIPS register names by default. */ reg_names = std_reg_names; @@ -297,71 +297,75 @@ set_mips_isa_type (mach, isa, cputype) { case bfd_mach_mips3000: target_processor = CPU_R3000; - mips_isa = 1; + mips_isa = ISA_MIPS1; break; case bfd_mach_mips3900: target_processor = CPU_R3900; - mips_isa = 1; + mips_isa = ISA_MIPS1; break; case bfd_mach_mips4000: target_processor = CPU_R4000; - mips_isa = 3; + mips_isa = ISA_MIPS3; break; case bfd_mach_mips4010: target_processor = CPU_R4010; - mips_isa = 2; + mips_isa = ISA_MIPS2; break; case bfd_mach_mips4100: target_processor = CPU_VR4100; - mips_isa = 3; + mips_isa = ISA_MIPS3; break; case bfd_mach_mips4111: target_processor = CPU_VR4100; /* FIXME: Shouldn't this be CPU_R4111 ??? */ - mips_isa = 3; + mips_isa = ISA_MIPS3; break; case bfd_mach_mips4300: target_processor = CPU_R4300; - mips_isa = 3; + mips_isa = ISA_MIPS3; break; case bfd_mach_mips4400: target_processor = CPU_R4400; - mips_isa = 3; + mips_isa = ISA_MIPS3; break; case bfd_mach_mips4600: target_processor = CPU_R4600; - mips_isa = 3; + mips_isa = ISA_MIPS3; break; case bfd_mach_mips4650: target_processor = CPU_R4650; - mips_isa = 3; - break; - case bfd_mach_mips4K: - target_processor = CPU_4K; - mips_isa = 2; + mips_isa = ISA_MIPS3; break; case bfd_mach_mips5000: target_processor = CPU_R5000; - mips_isa = 4; + mips_isa = ISA_MIPS4; break; case bfd_mach_mips6000: target_processor = CPU_R6000; - mips_isa = 2; + mips_isa = ISA_MIPS2; break; case bfd_mach_mips8000: target_processor = CPU_R8000; - mips_isa = 4; + mips_isa = ISA_MIPS4; break; case bfd_mach_mips10000: target_processor = CPU_R10000; - mips_isa = 4; + mips_isa = ISA_MIPS4; break; case bfd_mach_mips16: target_processor = CPU_MIPS16; - mips_isa = 3; + mips_isa = ISA_MIPS3; + break; + case bfd_mach_mips32: + target_processor = CPU_MIPS32; + mips_isa = ISA_MIPS32; + break; + case bfd_mach_mips32_4k: + target_processor = CPU_MIPS32_4K; + mips_isa = ISA_MIPS32; break; default: target_processor = CPU_R3000; - mips_isa = 3; + mips_isa = ISA_MIPS3; break; } diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 3e19ffa2f5d..622a2316b9e 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -77,8 +77,9 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * #define I3 INSN_ISA3 #define I4 INSN_ISA4 #define I5 INSN_ISA5 +#define I32 INSN_ISA32 + #define P3 INSN_4650 -#define P4 INSN_MIPS32 #define L1 INSN_4010 #define V1 INSN_4100 #define T3 INSN_3900 @@ -113,9 +114,9 @@ const struct mips_opcode mips_builtin_opcodes[] = them first. The assemblers uses a hash table based on the instruction name anyhow. */ /* name, args, match, mask, pinfo, membership */ -{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, G3|M1|P4}, +{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, G3|M1|I32}, {"nop", "", 0x00000000, 0xffffffff, 0, I1 }, -{"ssnop", "", 0x00000040, 0xffffffff, 0, M1|P4 }, +{"ssnop", "", 0x00000040, 0xffffffff, 0, M1|I32 }, {"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */ {"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */ {"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 }, @@ -223,7 +224,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 }, {"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 }, {"break", "", 0x0000000d, 0xffffffff, TRAP, I1 }, -{"break", "B", 0x0000000d, 0xfc00003f, TRAP, P4 }, +{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 }, {"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 }, {"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 }, {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 }, @@ -322,7 +323,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 }, {"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 }, {"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 }, -{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|T3|M1|P4 }, +{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|T3|M1|I32 }, {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 }, {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 }, {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 }, @@ -332,8 +333,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 }, {"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 }, {"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 }, -{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|RD_s, P4 }, -{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|RD_s, P4 }, +{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|RD_s, I32 }, +{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|RD_s, I32 }, {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 }, {"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 }, {"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 }, @@ -362,7 +363,7 @@ const struct mips_opcode mips_builtin_opcodes[] = /* dctr and dctw are used on the r5000. */ {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 }, {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 }, -{"deret", "", 0x4200001f, 0xffffffff, 0, G2|M1|P4 }, +{"deret", "", 0x4200001f, 0xffffffff, 0, G2|M1|I32 }, /* For ddiv, see the comments about div. */ {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 }, {"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 }, @@ -434,7 +435,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 }, {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 }, {"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 }, -{"eret", "", 0x42000018, 0xffffffff, 0, I3|M1|P4 }, +{"eret", "", 0x42000018, 0xffffffff, 0, I3|M1|I32}, {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 }, {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 }, {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 }, @@ -531,29 +532,29 @@ const struct mips_opcode mips_builtin_opcodes[] = {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 }, {"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 }, {"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 }, -{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3|P4 }, -{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3|P4 }, +{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3|I32 }, +{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3|I32 }, {"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 }, {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 }, {"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 }, {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 }, -{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P4 }, +{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 }, {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1 }, {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1 }, {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 }, -{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P4 }, +{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 }, {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1}, {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1}, {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 }, {"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 }, -{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, P4 }, +{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 }, {"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1}, {"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1}, -{"mfc1", "t,G,H", 0x44000000, 0xffe007f8, LCD|WR_t|RD_S|FP_S, P4}, +{"mfc1", "t,G,H", 0x44000000, 0xffe007f8, LCD|WR_t|RD_S|FP_S, I32}, {"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 }, -{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, P4 }, +{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 }, {"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 }, -{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, P4 }, +{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, I32 }, {"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 }, {"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 }, {"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 }, @@ -563,7 +564,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|M1 }, {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|M1 }, {"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 }, -{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1|P4 }, +{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1|I32 }, {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s,L1 }, {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|M1 }, {"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|M1 }, @@ -571,7 +572,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|M1 }, {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|M1 }, {"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5}, -{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1|P4 }, +{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1|I32 }, {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s,L1 }, {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|M1 }, {"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|M1 }, @@ -580,24 +581,24 @@ const struct mips_opcode mips_builtin_opcodes[] = {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 }, {"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 }, {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 }, -{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P4 }, +{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 }, {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 }, -{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P4 }, +{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 }, {"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 }, -{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, P4 }, +{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 }, {"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 }, {"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 }, -{"mtc1", "t,G,H", 0x44800000, 0xffe007f8, COD|RD_t|WR_S|FP_S, P4 }, +{"mtc1", "t,G,H", 0x44800000, 0xffe007f8, COD|RD_t|WR_S|FP_S, I32 }, {"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 }, -{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, P4 }, +{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 }, {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 }, -{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, P4 }, +{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I32 }, {"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 }, {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 }, {"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 }, {"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 }, {"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 }, -{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, P3|P4 }, +{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, P3|I32 }, {"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 }, {"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 }, {"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 }, @@ -667,7 +668,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2|M1 }, {"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2|M1 }, {"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2|M1 }, -{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, P4 }, +{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 }, {"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 }, {"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 }, {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 }, @@ -775,10 +776,10 @@ const struct mips_opcode mips_builtin_opcodes[] = {"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */ {"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 }, -{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1|M1|P4 }, -{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1|M1|P4 }, -{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1|M1|P4 }, -{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1|M1|P4 }, +{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1|M1|I32 }, +{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1|M1|I32 }, +{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1|M1|I32 }, +{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1|M1|I32 }, {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, {"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 }, {"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 }, @@ -819,8 +820,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 }, {"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 }, {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 }, -{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|M1|P4 }, -{"wait", "J", 0x42000020, 0xfe00003f, TRAP, P4 }, +{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|M1|I32 }, +{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 }, {"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 }, {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 }, /* No hazard protection on coprocessor instructions--they shouldn't diff --git a/opcodes/po/opcodes.pot b/opcodes/po/opcodes.pot index ab99ee16d2f..f65a42b3532 100644 --- a/opcodes/po/opcodes.pot +++ b/opcodes/po/opcodes.pot @@ -6,7 +6,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" -"POT-Creation-Date: 2000-09-05 17:03-0700\n" +"POT-Creation-Date: 2000-12-01 13:18-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -22,7 +22,8 @@ msgstr "" msgid "jump hint unaligned" msgstr "" -#: arc-dis.c:232 +#. Default text to print if an instruction isn't recognized. +#: arc-dis.c:232 fr30-dis.c:39 m32r-dis.c:39 msgid "*unknown*" msgstr "" @@ -48,21 +49,21 @@ msgstr "" msgid "branch address not on 4 byte boundary" msgstr "" -#: arm-dis.c:466 +#: arm-dis.c:489 msgid "<illegal precision>" msgstr "" -#: arm-dis.c:878 +#: arm-dis.c:904 #, c-format msgid "Unrecognised register name set: %s\n" msgstr "" -#: arm-dis.c:885 +#: arm-dis.c:911 #, c-format msgid "Unrecognised disassembler option: %s\n" msgstr "" -#: arm-dis.c:1049 +#: arm-dis.c:1075 msgid "" "\n" "The following ARM specific disassembler options are supported for use with\n" @@ -203,6 +204,10 @@ msgstr "" msgid "%02x\t\t*unknown*" msgstr "" +#: i386-dis.c:1949 +msgid "<internal disassembler error>" +msgstr "" + #: m10200-dis.c:199 #, c-format msgid "unknown\t0x%02x" @@ -233,7 +238,7 @@ msgstr "" msgid "# <dis error: %08x>" msgstr "" -#: mips-dis.c:242 +#: mips-dis.c:273 #, c-format msgid "# internal error, undefined modifier(%c)" msgstr "" @@ -277,21 +282,21 @@ msgid "invalid register operand when updating" msgstr "" #. Mark as non-valid instruction -#: sparc-dis.c:743 +#: sparc-dis.c:748 msgid "unknown" msgstr "" -#: sparc-dis.c:815 +#: sparc-dis.c:823 #, c-format msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n" msgstr "" -#: sparc-dis.c:826 +#: sparc-dis.c:834 #, c-format msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n" msgstr "" -#: sparc-dis.c:875 +#: sparc-dis.c:883 #, c-format msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n" msgstr "" |