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authorMike Frysinger <vapier@gentoo.org>2012-03-21 04:50:01 +0000
committerMike Frysinger <vapier@gentoo.org>2012-03-21 04:50:01 +0000
commitaf209c380fc4abb3a1a3c9f48687115c04774990 (patch)
tree53623842d64e57d84c6359aeaf8ecd9df7451626 /sim
parent5c73fae0103a2f083f60467d30d110bcca07b6af (diff)
downloadbinutils-gdb-af209c380fc4abb3a1a3c9f48687115c04774990.tar.gz
sim: cris: update testsuite output after strsignal change
Diffstat (limited to 'sim')
-rw-r--r--sim/testsuite/sim/cris/ChangeLog13
-rw-r--r--sim/testsuite/sim/cris/asm/addqpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/boundmv32.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/fidxd.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/fidxi.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/ftagd.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/ftagi.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/halt.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/io6.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/io7.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/io8.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/io9.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movecpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movempc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movepcb.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movepcd.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movepcw.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/moveqpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/moverbpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/moverdpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/moverpcb.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/moverpcw.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/moverwpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movppc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movrss.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movscpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movsmpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movsrpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movssr.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movucpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movumpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/movurpc.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/msteppc1.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/msteppc2.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/msteppc3.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/rfg.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/sbfs.ms2
-rw-r--r--sim/testsuite/sim/cris/asm/subqpc.ms2
38 files changed, 50 insertions, 37 deletions
diff --git a/sim/testsuite/sim/cris/ChangeLog b/sim/testsuite/sim/cris/ChangeLog
index eb8efc99fab..f206a4055f2 100644
--- a/sim/testsuite/sim/cris/ChangeLog
+++ b/sim/testsuite/sim/cris/ChangeLog
@@ -1,3 +1,16 @@
+2012-03-21 Mike Frysinger <vapier@gentoo.org>
+
+ * asm/addqpc.ms: Update output to ignore decoded signal string.
+ * asm/boundmv32.ms, asm/fidxd.ms, asm/fidxi.ms, asm/ftagd.ms,
+ asm/ftagi.ms, asm/halt.ms, asm/io6.ms, asm/io7.ms, asm/io8.ms,
+ asm/io9.ms, asm/movecpc.ms, asm/movempc.ms, asm/movepcb.ms,
+ asm/movepcd.ms, asm/movepcw.ms, asm/moveqpc.ms, asm/moverbpc.ms,
+ asm/moverdpc.ms, asm/moverpcb.ms, asm/moverpcw.ms, asm/moverwpc.ms,
+ asm/movppc.ms, asm/movrss.ms, asm/movscpc.ms, asm/movsmpc.ms,
+ asm/movsrpc.ms, asm/movssr.ms, asm/movucpc.ms, asm/movumpc.ms,
+ asm/movurpc.ms, asm/msteppc1.ms, asm/msteppc2.ms, asm/msteppc3.ms,
+ asm/rfg.ms, asm/sbfs.ms, asm/subqpc.ms: Likewise.
+
2010-10-07 Hans-Peter Nilsson <hp@axis.com>
* c/seek3.c, c/seek4.c: New tests.
diff --git a/sim/testsuite/sim/cris/asm/addqpc.ms b/sim/testsuite/sim/cris/asm/addqpc.ms
index 13e293e07ac..ba5a1ec239c 100644
--- a/sim/testsuite/sim/cris/asm/addqpc.ms
+++ b/sim/testsuite/sim/cris/asm/addqpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/boundmv32.ms b/sim/testsuite/sim/cris/asm/boundmv32.ms
index 4aad1ef58ef..560276eae61 100644
--- a/sim/testsuite/sim/cris/asm/boundmv32.ms
+++ b/sim/testsuite/sim/cris/asm/boundmv32.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: program stopped with signal 4.\n
+# output: program stopped with signal 4 (*).\n
.include "testutils.inc"
; Check that bound with a memory operand is invalid.
diff --git a/sim/testsuite/sim/cris/asm/fidxd.ms b/sim/testsuite/sim/cris/asm/fidxd.ms
index 447e397e178..8158682117d 100644
--- a/sim/testsuite/sim/cris/asm/fidxd.ms
+++ b/sim/testsuite/sim/cris/asm/fidxd.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: FIDXD isn't implemented\nprogram stopped with signal 5.\n
+# output: FIDXD isn't implemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/fidxi.ms b/sim/testsuite/sim/cris/asm/fidxi.ms
index fdee4483d54..1c41ed4c2f6 100644
--- a/sim/testsuite/sim/cris/asm/fidxi.ms
+++ b/sim/testsuite/sim/cris/asm/fidxi.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: FIDXI isn't implemented\nprogram stopped with signal 5.\n
+# output: FIDXI isn't implemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/ftagd.ms b/sim/testsuite/sim/cris/asm/ftagd.ms
index 87c7f130adf..74d4de34130 100644
--- a/sim/testsuite/sim/cris/asm/ftagd.ms
+++ b/sim/testsuite/sim/cris/asm/ftagd.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: FTAGD isn't implemented\nprogram stopped with signal 5.\n
+# output: FTAGD isn't implemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/ftagi.ms b/sim/testsuite/sim/cris/asm/ftagi.ms
index 506847648db..187d22d33a4 100644
--- a/sim/testsuite/sim/cris/asm/ftagi.ms
+++ b/sim/testsuite/sim/cris/asm/ftagi.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: FTAGI isn't implemented\nprogram stopped with signal 5.\n
+# output: FTAGI isn't implemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/halt.ms b/sim/testsuite/sim/cris/asm/halt.ms
index 368c367479b..fb4dcb0be57 100644
--- a/sim/testsuite/sim/cris/asm/halt.ms
+++ b/sim/testsuite/sim/cris/asm/halt.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: HALT isn't implemented\nprogram stopped with signal 5.\n
+# output: HALT isn't implemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/io6.ms b/sim/testsuite/sim/cris/asm/io6.ms
index 6f3c25d04b8..3af3536265e 100644
--- a/sim/testsuite/sim/cris/asm/io6.ms
+++ b/sim/testsuite/sim/cris/asm/io6.ms
@@ -4,7 +4,7 @@
# xerror:
# output: b1e\n
# output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
; Check that invalid access to the simulator area is recognized.
; "FAIL" area.
diff --git a/sim/testsuite/sim/cris/asm/io7.ms b/sim/testsuite/sim/cris/asm/io7.ms
index 8c8b46122d0..84488e9452e 100644
--- a/sim/testsuite/sim/cris/asm/io7.ms
+++ b/sim/testsuite/sim/cris/asm/io7.ms
@@ -4,7 +4,7 @@
# xerror:
# output: ce11d0c\n
# output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
; Check that invalid access to the simulator area is recognized.
; "PASS" area.
diff --git a/sim/testsuite/sim/cris/asm/io8.ms b/sim/testsuite/sim/cris/asm/io8.ms
index 0ba9287b881..49163fd0423 100644
--- a/sim/testsuite/sim/cris/asm/io8.ms
+++ b/sim/testsuite/sim/cris/asm/io8.ms
@@ -3,7 +3,7 @@
# xerror:
# output: b1e\n
# output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
; Check invalid access valid with --cris-900000xx.
; "FAIL" area.
diff --git a/sim/testsuite/sim/cris/asm/io9.ms b/sim/testsuite/sim/cris/asm/io9.ms
index afcb5913ac6..3b929a3c8a0 100644
--- a/sim/testsuite/sim/cris/asm/io9.ms
+++ b/sim/testsuite/sim/cris/asm/io9.ms
@@ -3,7 +3,7 @@
# xerror:
# output: ce11d0c\n
# output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
; Check invalid access valid with --cris-900000xx.
; "PASS" area.
diff --git a/sim/testsuite/sim/cris/asm/movecpc.ms b/sim/testsuite/sim/cris/asm/movecpc.ms
index cba1c212305..880a0f8f3db 100644
--- a/sim/testsuite/sim/cris/asm/movecpc.ms
+++ b/sim/testsuite/sim/cris/asm/movecpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register * PC is not implemented.\nprogram stopped with signal 5 (*).\n
# We deliberately match both "read from" and "write to" above.
diff --git a/sim/testsuite/sim/cris/asm/movempc.ms b/sim/testsuite/sim/cris/asm/movempc.ms
index 1fd14167469..cbbfcc1725f 100644
--- a/sim/testsuite/sim/cris/asm/movempc.ms
+++ b/sim/testsuite/sim/cris/asm/movempc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movepcb.ms b/sim/testsuite/sim/cris/asm/movepcb.ms
index 0dcc396d3b0..b06932e5793 100644
--- a/sim/testsuite/sim/cris/asm/movepcb.ms
+++ b/sim/testsuite/sim/cris/asm/movepcb.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/movepcd.ms b/sim/testsuite/sim/cris/asm/movepcd.ms
index 240db55d3ba..2ed0060c257 100644
--- a/sim/testsuite/sim/cris/asm/movepcd.ms
+++ b/sim/testsuite/sim/cris/asm/movepcd.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register * PC is not implemented.\nprogram stopped with signal 5 (*).\n
# Both source and dest contain PC for "test.d r" (move.d r,r). Ideally,
# the output message should say "read" of PC, but we allow PC as source in
diff --git a/sim/testsuite/sim/cris/asm/movepcw.ms b/sim/testsuite/sim/cris/asm/movepcw.ms
index d51b0d9c0c7..0f3b6a2e3b7 100644
--- a/sim/testsuite/sim/cris/asm/movepcw.ms
+++ b/sim/testsuite/sim/cris/asm/movepcw.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/moveqpc.ms b/sim/testsuite/sim/cris/asm/moveqpc.ms
index dea5106ab05..d5e856b3024 100644
--- a/sim/testsuite/sim/cris/asm/moveqpc.ms
+++ b/sim/testsuite/sim/cris/asm/moveqpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/moverbpc.ms b/sim/testsuite/sim/cris/asm/moverbpc.ms
index 34a1f3c0188..b5ea388e842 100644
--- a/sim/testsuite/sim/cris/asm/moverbpc.ms
+++ b/sim/testsuite/sim/cris/asm/moverbpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/moverdpc.ms b/sim/testsuite/sim/cris/asm/moverdpc.ms
index 34a1f3c0188..b5ea388e842 100644
--- a/sim/testsuite/sim/cris/asm/moverdpc.ms
+++ b/sim/testsuite/sim/cris/asm/moverdpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/moverpcb.ms b/sim/testsuite/sim/cris/asm/moverpcb.ms
index d95d9dafcb1..13e04b16011 100644
--- a/sim/testsuite/sim/cris/asm/moverpcb.ms
+++ b/sim/testsuite/sim/cris/asm/moverpcb.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/moverpcw.ms b/sim/testsuite/sim/cris/asm/moverpcw.ms
index 88681fb505a..9b8f92984e1 100644
--- a/sim/testsuite/sim/cris/asm/moverpcw.ms
+++ b/sim/testsuite/sim/cris/asm/moverpcw.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/moverwpc.ms b/sim/testsuite/sim/cris/asm/moverwpc.ms
index 34a1f3c0188..b5ea388e842 100644
--- a/sim/testsuite/sim/cris/asm/moverwpc.ms
+++ b/sim/testsuite/sim/cris/asm/moverwpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
startnostack
diff --git a/sim/testsuite/sim/cris/asm/movppc.ms b/sim/testsuite/sim/cris/asm/movppc.ms
index e100e25dd75..ee7e8d140ad 100644
--- a/sim/testsuite/sim/cris/asm/movppc.ms
+++ b/sim/testsuite/sim/cris/asm/movppc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movrss.ms b/sim/testsuite/sim/cris/asm/movrss.ms
index 964c1611483..42305f9d6a7 100644
--- a/sim/testsuite/sim/cris/asm/movrss.ms
+++ b/sim/testsuite/sim/cris/asm/movrss.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: Write to support register is unimplemented\nprogram stopped with signal 5.\n
+# output: Write to support register is unimplemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movscpc.ms b/sim/testsuite/sim/cris/asm/movscpc.ms
index a753e236347..98618966f0f 100644
--- a/sim/testsuite/sim/cris/asm/movscpc.ms
+++ b/sim/testsuite/sim/cris/asm/movscpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movsmpc.ms b/sim/testsuite/sim/cris/asm/movsmpc.ms
index 16d818b8d30..95f40ad0ac3 100644
--- a/sim/testsuite/sim/cris/asm/movsmpc.ms
+++ b/sim/testsuite/sim/cris/asm/movsmpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movsrpc.ms b/sim/testsuite/sim/cris/asm/movsrpc.ms
index fccf31a1ce8..6971e378338 100644
--- a/sim/testsuite/sim/cris/asm/movsrpc.ms
+++ b/sim/testsuite/sim/cris/asm/movsrpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movssr.ms b/sim/testsuite/sim/cris/asm/movssr.ms
index 62663c1c04a..79e4fbd6f6c 100644
--- a/sim/testsuite/sim/cris/asm/movssr.ms
+++ b/sim/testsuite/sim/cris/asm/movssr.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: Read of support register is unimplemented\nprogram stopped with signal 5.\n
+# output: Read of support register is unimplemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movucpc.ms b/sim/testsuite/sim/cris/asm/movucpc.ms
index 91fe4de8767..aec82d1ade1 100644
--- a/sim/testsuite/sim/cris/asm/movucpc.ms
+++ b/sim/testsuite/sim/cris/asm/movucpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movumpc.ms b/sim/testsuite/sim/cris/asm/movumpc.ms
index eecddf2b744..9bfc492d3f0 100644
--- a/sim/testsuite/sim/cris/asm/movumpc.ms
+++ b/sim/testsuite/sim/cris/asm/movumpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/movurpc.ms b/sim/testsuite/sim/cris/asm/movurpc.ms
index a90c49282ab..3d7511076c6 100644
--- a/sim/testsuite/sim/cris/asm/movurpc.ms
+++ b/sim/testsuite/sim/cris/asm/movurpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/msteppc1.ms b/sim/testsuite/sim/cris/asm/msteppc1.ms
index 5c78e0b34ac..d21ffd77e1d 100644
--- a/sim/testsuite/sim/cris/asm/msteppc1.ms
+++ b/sim/testsuite/sim/cris/asm/msteppc1.ms
@@ -1,7 +1,7 @@
# mach: crisv3 crisv8 crisv10
# xerror:
# output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/msteppc2.ms b/sim/testsuite/sim/cris/asm/msteppc2.ms
index e78be45c0a5..69bfbaf0e71 100644
--- a/sim/testsuite/sim/cris/asm/msteppc2.ms
+++ b/sim/testsuite/sim/cris/asm/msteppc2.ms
@@ -1,7 +1,7 @@
# mach: crisv3 crisv8 crisv10
# xerror:
# output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/msteppc3.ms b/sim/testsuite/sim/cris/asm/msteppc3.ms
index 9e6d30124b8..09e87a32494 100644
--- a/sim/testsuite/sim/cris/asm/msteppc3.ms
+++ b/sim/testsuite/sim/cris/asm/msteppc3.ms
@@ -1,7 +1,7 @@
# mach: crisv3 crisv8 crisv10
# xerror:
# output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/rfg.ms b/sim/testsuite/sim/cris/asm/rfg.ms
index f5439edd446..aa664b28e5b 100644
--- a/sim/testsuite/sim/cris/asm/rfg.ms
+++ b/sim/testsuite/sim/cris/asm/rfg.ms
@@ -1,6 +1,6 @@
# mach: crisv32
# xerror:
-# output: RFG isn't implemented\nprogram stopped with signal 5.\n
+# output: RFG isn't implemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/sbfs.ms b/sim/testsuite/sim/cris/asm/sbfs.ms
index 1138e69249a..5714b5237c6 100644
--- a/sim/testsuite/sim/cris/asm/sbfs.ms
+++ b/sim/testsuite/sim/cris/asm/sbfs.ms
@@ -1,6 +1,6 @@
# mach: crisv10
# xerror:
-# output: SBFS isn't implemented\nprogram stopped with signal 5.\n
+# output: SBFS isn't implemented\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start
diff --git a/sim/testsuite/sim/cris/asm/subqpc.ms b/sim/testsuite/sim/cris/asm/subqpc.ms
index dd4d2bfd94f..e2679a3e421 100644
--- a/sim/testsuite/sim/cris/asm/subqpc.ms
+++ b/sim/testsuite/sim/cris/asm/subqpc.ms
@@ -1,6 +1,6 @@
# mach: crisv3 crisv8 crisv10
# xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
.include "testutils.inc"
start