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authorDoug Evans <dje@google.com>1998-12-14 23:31:28 +0000
committerDoug Evans <dje@google.com>1998-12-14 23:31:28 +0000
commitb58ffc7b4ec1d5fd2829784ea1c78b7e3df7479b (patch)
tree7a64dde12197de63be27c7ee739fc6e24aaed100 /sim/testsuite/sim/m32r/uread32.ms
parent71d0d0a788ed0ecdcad1f06499c42aa364dadc02 (diff)
downloadbinutils-gdb-b58ffc7b4ec1d5fd2829784ea1c78b7e3df7479b.tar.gz
* sim/m32r/uread16.ms: New testcase.
* sim/m32r/uread32.ms: New testcase. * sim/m32r/uwrite16.ms: New testcase. * sim/m32r/uwrite32.ms: New testcase.
Diffstat (limited to 'sim/testsuite/sim/m32r/uread32.ms')
-rw-r--r--sim/testsuite/sim/m32r/uread32.ms18
1 files changed, 18 insertions, 0 deletions
diff --git a/sim/testsuite/sim/m32r/uread32.ms b/sim/testsuite/sim/m32r/uread32.ms
new file mode 100644
index 00000000000..935c71624e4
--- /dev/null
+++ b/sim/testsuite/sim/m32r/uread32.ms
@@ -0,0 +1,18 @@
+# mach: m32r m32rx
+# xerror:
+# output: *misaligned read*
+
+ .include "testutils.inc"
+
+ start
+
+; construct bra trap2_handler in trap 2 slot
+ ld24 r0,#foo+1
+ ld r0,@r0
+ fail
+ exit 0
+
+.data
+ .p2align 2
+foo:
+ .word 42