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author | Andrew Cagney <cagney@redhat.com> | 2003-06-22 16:48:12 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 2003-06-22 16:48:12 +0000 |
commit | 345d88d96ee2f82d2ec0d1c69cd14506b707b945 (patch) | |
tree | 77fe7fa191a6afc07968fbe9421257fb5da8c504 /sim/ppc/altivec_expression.h | |
parent | 70ecf948d924b4fdc84ba07d2f0c0ee141295ef7 (diff) | |
download | binutils-gdb-345d88d96ee2f82d2ec0d1c69cd14506b707b945.tar.gz |
2003-06-22 Andrew Cagney <cagney@redhat.com>
Written by matthew green <mrg@redhat.com>, with fixes from Aldy
Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and
Nick Clifton <nickc@redhat.com>.
* ppc-instructions: Include altivec.igen and e500.igen.
(model_busy, model_data): Add vr_busy and vscr_busy.
(model_trace_release): Trace vr_busy and vscr_busy.
(model_new_cycle): Update vr_busy and vscr_busy.
(model_make_busy): Update vr_busy and vscr_busy.
* registers.c (register_description): Add Altivec and e500
registers.
* psim.c (psim_read_register, psim_read_register): Handle Altivec
and e500 registers.
* ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers.
* configure.in (sim_filter): When *altivec* add "av". When *spe*
or *simd* add e500.
(sim_float): When *altivec* define WITH_ALTIVEC. When *spe* add
WITH_E500.
* configure: Re-generate.
* e500.igen, altivec.igen: New files.
* e500_expression.h, altivec_expression.h: New files.
* idecode_expression.h: Update copyright. Include
"e500_expression.h" and "altivec_expression.h".
* e500_registers.h, altivec_registers.h: New files.
* registers.h: Update copyright. Include "e500_registers.h" and
"altivec_registers.h".
(registers): Add Altivec and e500 specific registers.
* Makefile.in (IDECODE_H): Add "idecode_e500.h" and
"idecode_altivec.h".
(REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h".
(tmp-igen): Add dependencies on altivec.igen and e500.igen .
Diffstat (limited to 'sim/ppc/altivec_expression.h')
-rw-r--r-- | sim/ppc/altivec_expression.h | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/sim/ppc/altivec_expression.h b/sim/ppc/altivec_expression.h new file mode 100644 index 00000000000..6cf2e7648c3 --- /dev/null +++ b/sim/ppc/altivec_expression.h @@ -0,0 +1,50 @@ +/* Altivec expression macros, for PSIM, the PowerPC simulator. + + Copyright 2003 Free Software Foundation, Inc. + + Contributed by Red Hat Inc; developed under contract from Motorola. + Written by matthew green <mrg@redhat.com>. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +/* AltiVec macro helpers. */ + +#define ALTIVEC_SET_CR6(vS, checkone) \ +do { \ + if (checkone && ((*vS).w[0] == 0xffffffff && \ + (*vS).w[1] == 0xffffffff && \ + (*vS).w[2] == 0xffffffff && \ + (*vS).w[3] == 0xffffffff)) \ + CR_SET(6, 1 << 3); \ + else if ((*vS).w[0] == 0 && \ + (*vS).w[1] == 0 && \ + (*vS).w[2] == 0 && \ + (*vS).w[3] == 0) \ + CR_SET(6, 1 << 1); \ + else \ + CR_SET(6, 0); \ +} while (0) + +#define VSCR_SAT 0x00000001 +#define VSCR_NJ 0x00010000 + +#define ALTIVEC_SET_SAT(sat) \ +do { \ + if (sat) \ + VSCR |= VSCR_SAT; \ +} while (0) |