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author | Alexandre Oliva <aoliva@redhat.com> | 2000-05-18 22:56:28 +0000 |
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committer | Alexandre Oliva <aoliva@redhat.com> | 2000-05-18 22:56:28 +0000 |
commit | 24a39d88a230d59a3a6ccd1b38b89f606e60acdb (patch) | |
tree | 3c1d56b97f678aa817f44bd8416901d9e22d0b18 /sim/mn10300/op_utils.c | |
parent | 8c5ff9729dca82de53213f16112b7e57e6c7282a (diff) | |
download | binutils-gdb-24a39d88a230d59a3a6ccd1b38b89f606e60acdb.tar.gz |
* mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
genericXor, genericBtst): Use `unsigned32'.
* op_utils.c: Likewise.
* mn10300.igen, am33.igen: Use `unsigned32', `signed32',
`unsigned64' or `signed64' where type width is relevant.
Diffstat (limited to 'sim/mn10300/op_utils.c')
-rw-r--r-- | sim/mn10300/op_utils.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/sim/mn10300/op_utils.c b/sim/mn10300/op_utils.c index 0a966ed7355..b46210f6b40 100644 --- a/sim/mn10300/op_utils.c +++ b/sim/mn10300/op_utils.c @@ -36,10 +36,10 @@ INLINE_SIM_MAIN (void) -genericAdd(unsigned long source, unsigned long destReg) +genericAdd(unsigned32 source, unsigned32 destReg) { int z, c, n, v; - unsigned long dest, sum; + unsigned32 dest, sum; dest = State.regs[destReg]; sum = source + dest; @@ -60,10 +60,10 @@ genericAdd(unsigned long source, unsigned long destReg) INLINE_SIM_MAIN (void) -genericSub(unsigned long source, unsigned long destReg) +genericSub(unsigned32 source, unsigned32 destReg) { int z, c, n, v; - unsigned long dest, difference; + unsigned32 dest, difference; dest = State.regs[destReg]; difference = dest - source; @@ -81,10 +81,10 @@ genericSub(unsigned long source, unsigned long destReg) } INLINE_SIM_MAIN (void) -genericCmp(unsigned long leftOpnd, unsigned long rightOpnd) +genericCmp(unsigned32 leftOpnd, unsigned32 rightOpnd) { int z, c, n, v; - unsigned long value; + unsigned32 value; value = rightOpnd - leftOpnd; @@ -101,7 +101,7 @@ genericCmp(unsigned long leftOpnd, unsigned long rightOpnd) INLINE_SIM_MAIN (void) -genericOr(unsigned long source, unsigned long destReg) +genericOr(unsigned32 source, unsigned32 destReg) { int n, z; @@ -114,7 +114,7 @@ genericOr(unsigned long source, unsigned long destReg) INLINE_SIM_MAIN (void) -genericXor(unsigned long source, unsigned long destReg) +genericXor(unsigned32 source, unsigned32 destReg) { int n, z; @@ -127,9 +127,9 @@ genericXor(unsigned long source, unsigned long destReg) INLINE_SIM_MAIN (void) -genericBtst(unsigned long leftOpnd, unsigned long rightOpnd) +genericBtst(unsigned32 leftOpnd, unsigned32 rightOpnd) { - unsigned long temp; + unsigned32 temp; int z, n; temp = rightOpnd; |