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author | Andrew Cagney <cagney@redhat.com> | 1997-11-05 08:17:26 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-11-05 08:17:26 +0000 |
commit | 63be8febf762353b62e794963fdc65f1280a7498 (patch) | |
tree | 3d79e72b7f56c6597f4285efcc55562938d902ef /sim/common/sim-core.c | |
parent | 22de994d0e830082802fdd9033af16fb34f58dde (diff) | |
download | binutils-gdb-63be8febf762353b62e794963fdc65f1280a7498.tar.gz |
Rewrite the MIPS simulator's memory model so that it uses the generic
common/sim-core.
Add support for 3, 5, 6, 7 byte transfers to sim core.
Diffstat (limited to 'sim/common/sim-core.c')
-rw-r--r-- | sim/common/sim-core.c | 29 |
1 files changed, 20 insertions, 9 deletions
diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c index f79c7c39d7f..1a013591301 100644 --- a/sim/common/sim-core.c +++ b/sim/common/sim-core.c @@ -755,24 +755,35 @@ sim_core_xor_write_buffer (SIM_DESC sd, /* define the read/write 1/2/4/8/16/word functions */ -#define N 1 +#define N 16 #include "sim-n-core.h" -#undef N -#define N 2 +#define N 8 +#include "sim-n-core.h" + +#define N 7 +#define M 8 +#include "sim-n-core.h" + +#define N 6 +#define M 8 +#include "sim-n-core.h" + +#define N 5 +#define M 8 #include "sim-n-core.h" -#undef N #define N 4 #include "sim-n-core.h" -#undef N -#define N 8 +#define N 3 +#define M 4 #include "sim-n-core.h" -#undef N -#define N 16 +#define N 2 +#include "sim-n-core.h" + +#define N 1 #include "sim-n-core.h" -#undef N #endif |