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| author | Nick Clifton <nickc@redhat.com> | 2014-03-14 15:21:23 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2014-03-14 15:21:23 +0000 |
| commit | 8d052926671eb0e8c83ffab6d15a98790c215a36 (patch) | |
| tree | df4ee55e4b25e7bbd7202bc15724162ac14aa219 /sim/arm/armemu.h | |
| parent | b9366cf3955d81e26537ea1932b183dbdf237361 (diff) | |
| download | binutils-gdb-8d052926671eb0e8c83ffab6d15a98790c215a36.tar.gz | |
Add support for instruction level tracing to the ARM simulator.
* wrapper.c (op_print): New function.
(sim_dis_read): New function.
(print_insn): New function - disassembles the given instruction.
(sim_trace): Note that tracing is now allowed.
(sim_create_inferior): Default to emulating v6.
Initialise the disassembler machinery.
(sim_target_parse_command_line): Add support for -t -d and -z
options.
(sim_target_display_usage): Note existence of -d and -z options.
(sim_open): Parse -t -d and -z options.
* armemu.h: Add exports of trace, disas and trace_funcs.
Add prototype for print_insn.
* armemu.c (ARMul_Emulate26): Add tracing code.
Delete unused variables.
* thumbemu (handle_v6_thumb_insn): Delete unused variable Rd.
Move Rm variable into switch cases.
Add tracing code.
* armcopro.c (XScale_cp15_init): Add a return value.
(XScale_cp13_init): Likewise.
(XScale_cp14_init): Likewise.
(XScale_cp15_LDC): Delete unused function.
(XScale_cp15_STC): Likewise.
* maverick.c: Delete comment inside comment.
(DSPInit): Delete unused function.
(DSPMCR4): Fix compile time warning about missing parenthesis.
(DSPMCR5): Likewise.
(DSPCDP6): Delete unused variable opcode2.
Diffstat (limited to 'sim/arm/armemu.h')
| -rw-r--r-- | sim/arm/armemu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h index d61c85a983d..419f7990108 100644 --- a/sim/arm/armemu.h +++ b/sim/arm/armemu.h @@ -15,6 +15,10 @@ along with this program; if not, see <http://www.gnu.org/licenses/>. */ extern ARMword isize; +extern int trace; +extern int disas; +extern int trace_funcs; +extern void print_insn (ARMword); /* Condition code values. */ #define EQ 0 @@ -46,6 +50,10 @@ extern ARMword isize; #define CBIT (1L << 29) #define VBIT (1L << 28) #define SBIT (1L << 27) +#define GE0 (1L << 16) +#define GE1 (1L << 17) +#define GE2 (1L << 18) +#define GE3 (1L << 19) #define IBIT (1L << 7) #define FBIT (1L << 6) #define IFBITS (3L << 6) |