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authorBarney Stratford <barney_stratford@fastmail.fm>2014-07-01 10:20:17 +0100
committerNick Clifton <nickc@redhat.com>2014-07-01 10:20:17 +0100
commitf36e88862f94c15a88fa27df7af906ad75a42e7f (patch)
tree9add52ee9bff834949cac235d41b733efd326d4e /opcodes
parentba8e7d1e24bc53269b5814c99a321783dab3812a (diff)
downloadbinutils-gdb-f36e88862f94c15a88fa27df7af906ad75a42e7f.tar.gz
Add support for the AVR Tiny series of microcontrollers.
* archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog9
-rw-r--r--opcodes/avr-dis.c19
2 files changed, 26 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 26eec2b0348..800df07be83 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
+ Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+ Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+ Soundararajan <Sounderarajan.D@atmel.com>
+
+ * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
+ (print_insn_avr): Do not select opcode if insn ISA is avrtiny and machine
+ is not avrtiny.
+
2014-06-26 Philippe De Muyter <phdm@macqel.be>
* or1k-desc.h (spr_field_masks): Add U suffix to the end of long
diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c
index 9a8ae33a066..78c99481659 100644
--- a/opcodes/avr-dis.c
+++ b/opcodes/avr-dis.c
@@ -186,6 +186,17 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
case 'i':
sprintf (buf, "0x%04X", insn2);
break;
+
+ case 'j':
+ {
+ unsigned int val = ((insn & 0xf) | ((insn & 0x600) >> 5)
+ | ((insn & 0x100) >> 2));
+ if (val > 0 && !(insn & 0x100))
+ val |= 0x80;
+ sprintf (buf, "0x%02x", val);
+ sprintf (buf, "%d", val);
+ }
+ break;
case 'M':
sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
@@ -329,8 +340,12 @@ print_insn_avr (bfd_vma addr, disassemble_info *info)
for (opcode = avr_opcodes, maskptr = avr_bin_masks;
opcode->name;
opcode++, maskptr++)
- if ((insn & *maskptr) == opcode->bin_opcode)
- break;
+ {
+ if ((opcode->isa == AVR_ISA_TINY) && (info->mach != bfd_mach_avrtiny))
+ continue;
+ if ((insn & *maskptr) == opcode->bin_opcode)
+ break;
+ }
/* Special case: disassemble `ldd r,b+0' as `ld r,b', and
`std b+0,r' as `st b,r' (next entry in the table). */