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authorRichard Henderson <rth@redhat.com>2001-12-06 18:29:22 +0000
committerRichard Henderson <rth@redhat.com>2001-12-06 18:29:22 +0000
commit3793abc306aa06bcc87e39ceb04b6134d54f5ffd (patch)
tree405ab409e5cf909826d0dc04f534786fe50c5687 /opcodes
parent08ea3996883d64b82d64177184388e0c11f52c50 (diff)
downloadbinutils-gdb-3793abc306aa06bcc87e39ceb04b6134d54f5ffd.tar.gz
* alpha-opc.c (alpha_opcodes): Add wh64en.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/alpha-opc.c5
2 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 37b05361a4b..da7497fa9ac 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2001-12-06 Richard Henderson <rth@redhat.com>
+
+ * alpha-opc.c (alpha_opcodes): Add wh64en.
+
2001-12-04 Alexandre Oliva <aoliva@redhat.com>
* d10v-opc.c (d10v_predefined_registers): Remove warnings
diff --git a/opcodes/alpha-opc.c b/opcodes/alpha-opc.c
index 7680f47d2a1..d5f0314449e 100644
--- a/opcodes/alpha-opc.c
+++ b/opcodes/alpha-opc.c
@@ -30,10 +30,10 @@
almost all of the extended instruction mnemonics. This permits the
disassembler to use them, and simplifies the assembler logic, at the
cost of increasing the table size. The table is strictly constant
- data, so the compiler should be able to put it in the .text section.
+ data, so the compiler should be able to put it in the text segment.
This file also holds the operand table. All knowledge about inserting
- operands into instructions and vice-versa is kept in this file.
+ and extracting operands from instructions is kept in this file.
The information for the base instruction set was compiled from the
_Alpha Architecture Handbook_, Digital Order Number EC-QD2KB-TE,
@@ -1103,6 +1103,7 @@ const struct alpha_opcode alpha_opcodes[] = {
{ "ecb", MFC(0x18,0xE800), BASE, { ZA, PRB } }, /* ev56 una */
{ "rs", MFC(0x18,0xF000), BASE, { RA } },
{ "wh64", MFC(0x18,0xF800), BASE, { ZA, PRB } }, /* ev56 una */
+ { "wh64en", MFC(0x18,0xFC00), BASE, { ZA, PRB } }, /* ev7 una */
{ "hw_mfpr", OPR(0x19,0x00), EV4, { RA, RBA, EV4EXTHWINDEX } },
{ "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },