diff options
| author | Nick Clifton <nickc@redhat.com> | 2014-06-03 08:54:04 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2014-06-03 08:54:04 +0100 |
| commit | 9f445129581f24845c62c4124103f89b43dfd329 (patch) | |
| tree | 15a22906d11cbca2cf098b2d0b69fb07afa0a3e1 /opcodes | |
| parent | 69227609dc00d472115b00b70c8c4eca6befdd81 (diff) | |
| download | binutils-gdb-9f445129581f24845c62c4124103f89b43dfd329.tar.gz | |
Fix the disassembly of MSP430 extended index addressing mode.
* msp430-dis.c (msp430_doubleoperand): Use extension_word to
decide when extended addressing is being used.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/msp430-dis.c | 20 |
2 files changed, 16 insertions, 11 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ea036b1778c..ce5a20468f7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2014-06-03 Nick Clifton <nickc@redhat.com> + + * msp430-dis.c (msp430_doubleoperand): Use extension_word to + decide when extended addressing is being used. + 2014-06-02 Eric Botcazou <ebotcazou@adacore.com> * sparc-opc.c (cas): Disable for LEON. @@ -34,7 +39,7 @@ * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and mips64r5. (parse_mips_dis_option): Update MSA and virtualization support to - allow mips64r3 and mips64r5. + allow mips64r3 and mips64r5. 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com> diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c index 1284bbe44fe..33a9047b412 100644 --- a/opcodes/msp430-dis.c +++ b/opcodes/msp430-dis.c @@ -427,7 +427,7 @@ msp430_doubleoperand (disassemble_info *info, sprintf (op1, "0x%04x", PS (dst)); sprintf (comm1, "PC rel. 0x%04x", PS ((short) addr + 2 + dst)); - if (extended_dst) + if (extension_word) { dst |= extended_dst << 16; if (dst & 0x80000) @@ -448,7 +448,7 @@ msp430_doubleoperand (disassemble_info *info, cmd_len += 4; *cycles = 6; sprintf (op1, "&0x%04x", PS (dst)); - if (extended_dst) + if (extension_word) { dst |= extended_dst << 16; sprintf (op1, "&0x%05x", dst & 0xfffff); @@ -458,7 +458,7 @@ msp430_doubleoperand (disassemble_info *info, { /* Indexed. */ dst = msp430dis_opcode (addr + 2, info); - if (extended_dst) + if (extension_word) { dst |= extended_dst << 16; if (dst & 0x80000) @@ -519,7 +519,7 @@ msp430_doubleoperand (disassemble_info *info, sprintf (op1, "#%d", dst); if (dst > 9 || dst < 0) sprintf (comm1, "#0x%04x", PS (dst)); - if (extended_src) + if (extension_word) { dst |= extended_src << 16; if (dst & 0x80000) @@ -543,7 +543,7 @@ msp430_doubleoperand (disassemble_info *info, sprintf (op1, "0x%04x", PS (dst)); sprintf (comm1, "PC rel. 0x%04x", PS ((short) addr + 2 + dst)); - if (extended_src) + if (extension_word) { dst |= extended_src << 16; if (dst & 0x80000) @@ -561,7 +561,7 @@ msp430_doubleoperand (disassemble_info *info, cmd_len += 2; sprintf (op1, "&0x%04x", PS (dst)); sprintf (comm1, "0x%04x", PS (dst)); - if (extended_src) + if (extension_word) { dst |= extended_src << 16; sprintf (op1, "&0x%05x", dst & 0xfffff); @@ -580,7 +580,7 @@ msp430_doubleoperand (disassemble_info *info, /* Indexed. */ dst = msp430dis_opcode (addr + 2, info); cmd_len += 2; - if (extended_src) + if (extension_word) { dst |= extended_src << 16; if (dst & 0x80000) @@ -625,7 +625,7 @@ msp430_doubleoperand (disassemble_info *info, sprintf (op2, "0x%04x", PS (dst)); sprintf (comm2, "PC rel. 0x%04x", PS ((short) addr + cmd_len + dst)); - if (extended_dst) + if (extension_word) { dst |= extended_dst << 16; if (dst & 0x80000) @@ -642,7 +642,7 @@ msp430_doubleoperand (disassemble_info *info, dst = msp430dis_opcode (addr + cmd_len, info); cmd_len += 2; sprintf (op2, "&0x%04x", PS (dst)); - if (extended_dst) + if (extension_word) { dst |= extended_dst << 16; sprintf (op2, "&0x%05x", dst & 0xfffff); @@ -656,7 +656,7 @@ msp430_doubleoperand (disassemble_info *info, dst |= -1 << 16; if (dst > 9 || dst < 0) sprintf (comm2, "0x%04x", PS (dst)); - if (extended_dst) + if (extension_word) { dst |= extended_dst << 16; if (dst & 0x80000) |