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| author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2016-06-17 02:15:43 -0700 |
|---|---|---|
| committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2016-06-17 02:15:43 -0700 |
| commit | 96074adc6a780c7984645e3e42434be368974737 (patch) | |
| tree | 92cdfac6666b5231fee8118f3cd85fac36ea4747 /opcodes/sparc-dis.c | |
| parent | 7a10c22feb4dfb7e56855033d579338a6258722d (diff) | |
| download | binutils-gdb-96074adc6a780c7984645e3e42434be368974737.tar.gz | |
opcodes,gas: sparc: fix rdasr,wrasr,rdpr,wrpr,rdhpr,wrhpr insns.
This patch fixes and expands the definition of the read/write
instructions for ancillary-state, privileged and hyperprivileged
registers in opcodes.
It also adds support for three new v9m hyperprivileged registers:
%hmcdper, %hmcddfr and %hva_mask_nz.
Finally, the patch expands existing tests (and adds several new ones) in
order to cover all the read/write instructions in all its variants.
opcodes/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc-opc.c (rdasr): New macro.
(wrasr): Likewise.
(rdpr): Likewise.
(wrpr): Likewise.
(rdhpr): Likewise.
(wrhpr): Likewise.
(sparc_opcodes): Use the macros above to fix and expand the
definition of read/write instructions from/to
asr/privileged/hyperprivileged instructions.
* sparc-dis.c (v9_hpriv_reg_names): Add %hmcdper, %hmcddfr and
%hva_mask_nz. Prefer softint_set and softint_clear over
set_softint and clear_softint.
(print_insn_sparc): Support %ver in Rd.
gas/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper,
%hmcddfr and %hva_mask_nz.
(sparc_ip): New handling of asr/privileged/hyperprivileged
registers, adapted to the new form of the sparc opcodes table.
* testsuite/gas/sparc/rdasr.s: New file.
* testsuite/gas/sparc/rdasr.d: Likewise.
* testsuite/gas/sparc/wrasr.s: Likewise.
* testsuite/gas/sparc/wrasr.d: Likewise.
* testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and
wrasr tests.
* testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged
registers require it.
* testsuite/gas/sparc/wrpr.s: Complete to cover all privileged
registers and write instruction modalities.
* testsuite/gas/sparc/wrpr.d: Likewise.
* testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged
registers.
* testsuite/gas/sparc/rdhpr.d: Likewise.
* testsuite/gas/sparc/wrhpr.s: Likewise.
* testsuite/gas/sparc/wrhpr.d: Likewise.
Diffstat (limited to 'opcodes/sparc-dis.c')
| -rw-r--r-- | opcodes/sparc-dis.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c index c6f73ffa164..d48dee5d757 100644 --- a/opcodes/sparc-dis.c +++ b/opcodes/sparc-dis.c @@ -101,7 +101,7 @@ static char *v9_hpriv_reg_names[] = "hpstate", "htstate", "resv2", "hintp", "resv4", "htba", "hver", "resv7", "resv8", "resv9", "resv10", "resv11", "resv12", "resv13", "resv14", "resv15", "resv16", "resv17", "resv18", "resv19", "resv20", - "resv21", "resv22", "resv23", "resv24", "resv25", "resv26", "resv27", + "resv21", "resv22", "hmcdper", "hmcddfr", "resv25", "resv26", "hva_mask_nz", "hstick_offset", "hstick_enable", "resv30", "hstick_cmpr" }; @@ -109,7 +109,7 @@ static char *v9_hpriv_reg_names[] = rd and wr insns (-16). */ static char *v9a_asr_reg_names[] = { - "pcr", "pic", "dcr", "gsr", "set_softint", "clear_softint", + "pcr", "pic", "dcr", "gsr", "softint_set", "softint_clear", "softint", "tick_cmpr", "stick", "stick_cmpr", "cfr", "pause", "mwait" }; @@ -843,7 +843,9 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) break; case '!': - if (X_RD (insn) == 23) + if (X_RD (insn) == 31) + (*info->fprintf_func) (stream, "%%ver"); + else if (X_RD (insn) == 23) (*info->fprintf_func) (stream, "%%pmcdper"); else if ((unsigned) X_RD (insn) < 17) (*info->fprintf_func) (stream, "%%%s", |