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| author | H.J. Lu <hjl.tools@gmail.com> | 2015-08-12 04:45:07 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2015-08-12 04:45:07 -0700 |
| commit | 43e65147c07b1400ae0dbb6694882eceb2363713 (patch) | |
| tree | e52d56a58d00c74db6c82e736464ab0f500a7181 /opcodes/microblaze-opcm.h | |
| parent | f3445b37b67deb8f67f7885274b2544684503f78 (diff) | |
| download | binutils-gdb-43e65147c07b1400ae0dbb6694882eceb2363713.tar.gz | |
Remove trailing spaces in opcodes
Diffstat (limited to 'opcodes/microblaze-opcm.h')
| -rw-r--r-- | opcodes/microblaze-opcm.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h index 02631480719..5f96f53f573 100644 --- a/opcodes/microblaze-opcm.h +++ b/opcodes/microblaze-opcm.h @@ -18,7 +18,7 @@ along with this file; see the file COPYING. If not, write to the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - + #ifndef MICROBLAZE_OPCM #define MICROBLAZE_OPCM @@ -26,23 +26,23 @@ enum microblaze_instr { add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu, - addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, + addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, mulh, mulhu, mulhsu,swapb,swaph, idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput, ncget, ncput, muli, bslli, bsrai, bsrli, mului, /* 'or/and/xor' are C++ keywords. */ microblaze_or, microblaze_and, microblaze_xor, - andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, + andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, - bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, + bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, shr, sw, swr, swx, lbui, lhui, lwi, - sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, - fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - fint, fsqrt, + sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, + fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, + fint, fsqrt, tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, eget, ecget, neget, necget, eput, ecput, neput, necput, teget, tecget, tneget, tnecget, teput, tecput, tneput, tnecput, @@ -123,7 +123,7 @@ enum microblaze_instr_type /* Assembler Register - Used in Delay Slot Optimization. */ #define REG_AS 18 #define REG_ZERO 0 - + #define RD_LOW 21 /* Low bit for RD. */ #define RA_LOW 16 /* Low bit for RA. */ #define RB_LOW 11 /* Low bit for RB. */ |