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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-01-23 19:39:05 +0300 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-01-23 20:05:33 +0300 |
| commit | 3233d7d074e59b83f68a22071cff597f00d5ae81 (patch) | |
| tree | 624dbdd63e269a8c272c8b39061c0fc8592da026 /opcodes/i386-opc.tbl | |
| parent | b4f6242e95340a31b0519187c5fc329056ddecfd (diff) | |
| download | binutils-gdb-3233d7d074e59b83f68a22071cff597f00d5ae81.tar.gz | |
Enable Intel WBNOINVD instruction.
Intel has disclosed a set of new instructions for Icelake processor.
The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
This patch enables Intel WBNOINVD instruction.
gas/
* config/tc-i386.c (cpu_arch): Add .wbnoinvd.
* doc/c-i386.texi: Document .wbnoinvd.
* testsuite/gas/i386/i386.exp: Add WBNOINVD tests.
* testsuite/gas/i386/wbnoinvd-intel.d: New test.
* testsuite/gas/i386/wbnoinvd.d: Likewise.
* testsuite/gas/i386/wbnoinvd.s: Likewise.
* testsuite/gas/i386/x86-64-wbnoinvd-intel.d: Likewise.
* testsuite/gas/i386/x86-64-wbnoinvd.d: Likewise.
* testsuite/gas/i386/x86-64-wbnoinvd.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_0F09.
* i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
(cpu_flags): Add CpuWBNOINVD.
* i386-opc.h (enum): Add CpuWBNOINVD.
(i386_cpu_flags): Add cpuwbnoinvd.
* i386-opc.tbl: Add WBNOINVD instruction.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 7be2e625315..4466f51f616 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -6133,3 +6133,9 @@ endbr32, 0, 0xf30f1efb, None, 3, CpuIBT, IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_s notrack, 0, 0x3e, None, 1, CpuIBT, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, { 0 } // CET instructions end. + +// WBNOINVD instruction. + +wbnoinvd, 0, 0xf30f09, None, 2, CpuWBNOINVD, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } + +// WBNOINVD instruction end. |