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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-01-17 19:45:52 +0300 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-01-17 19:48:28 +0300 |
| commit | d777820bf5abea433c36e956b53b299502e0f708 (patch) | |
| tree | 16f28c3084e70a09de9fae5527b26d06a4a761fa /opcodes/i386-gen.c | |
| parent | 4bfce1283654832d83a01b700e61518233c8bbda (diff) | |
| download | binutils-gdb-d777820bf5abea433c36e956b53b299502e0f708.tar.gz | |
Replace CET bit with IBT and SHSTK bits.
The latest specification for Intel CET technology defined two
new bits instead of previously used CET bit. These are IBT and
SHSTK bits. The patch replaces CET bit with IBT and SHSTK bits.
gas/
* config/tc-i386.c (cpu_arch): Delete .cet. Add .ibt, .shstk.
(cpu_noarch): Add noibt, noshstk.
(parse_insn): Change cpucet to cpuibt.
* doc/c-i386.texi: Delete .cet. Add .ibt, .shstk.
* testsuite/gas/i386/cet-ibt-inval.l: New test.
* testsuite/gas/i386/cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/cet-shstk-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.s: Likewise.
opcodes/
* i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS,
CpuCET. Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
(cpu_flags): Add CpuIBT, CpuSHSTK.
* i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
(i386_cpu_flags): Add cpuibt, cpushstk.
* i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-gen.c')
| -rw-r--r-- | opcodes/i386-gen.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index d193278db6d..3fc2839af36 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -269,8 +269,10 @@ static initializer cpu_flag_init[] = "CpuRDPID" }, { "CPU_PTWRITE_FLAGS", "CpuPTWRITE" }, - { "CPU_CET_FLAGS", - "CpuCET" }, + { "CPU_IBT_FLAGS", + "CpuIBT" }, + { "CPU_SHSTK_FLAGS", + "CpuSHSTK" }, { "CPU_GFNI_FLAGS", "CpuGFNI" }, { "CPU_VAES_FLAGS", @@ -327,6 +329,10 @@ static initializer cpu_flag_init[] = "CpuAVX512_4VNNIW" }, { "CPU_ANY_AVX512_VPOPCNTDQ_FLAGS", "CpuAVX512_VPOPCNTDQ" }, + { "CPU_ANY_IBT_FLAGS", + "CpuIBT" }, + { "CPU_ANY_SHSTK_FLAGS", + "CpuSHSTK" }, { "CPU_ANY_AVX512_VBMI2_FLAGS", "CpuAVX512_VBMI2" }, { "CPU_ANY_AVX512_VNNI_FLAGS", @@ -558,7 +564,8 @@ static bitfield cpu_flags[] = BITFIELD (CpuOSPKE), BITFIELD (CpuRDPID), BITFIELD (CpuPTWRITE), - BITFIELD (CpuCET), + BITFIELD (CpuIBT), + BITFIELD (CpuSHSTK), BITFIELD (CpuGFNI), BITFIELD (CpuVAES), BITFIELD (CpuVPCLMULQDQ), |