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authorIgor Tsimbalist <igor.v.tsimbalist@intel.com>2017-10-20 23:42:40 +0300
committerIgor Tsimbalist <igor.v.tsimbalist@intel.com>2017-10-23 15:58:18 +0300
commitff1982d53a1fba573e7f9a3b455f7644440cb336 (patch)
tree0b68e46cb8d693c73dde19722009972f6939a7e2 /opcodes/i386-dis.c
parent8dcf1fadf2b0763962639fc5dcedc1892e502265 (diff)
downloadbinutils-gdb-ff1982d53a1fba573e7f9a3b455f7644440cb336.tar.gz
Enable Intel VPCLMULQDQ instruction.
Intel has disclosed a set of new instructions. The spec is https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf gas/ * config/tc-i386.c (cpu_arch): Add VPCLMULQDQ. * doc/c-i386.texi: Document VPCLMULQDQ. * testsuite/gas/i386/i386.exp: Run VPCLMULQDQ tests. * testsuite/gas/i386/avx512f_vpclmulqdq-intel.d: New test. * testsuite/gas/i386/avx512f_vpclmulqdq-wig.s: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq-wig1-intel.d: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq-wig1.d: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq.d: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq.s: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq-wig.s: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq.s: Ditto. * testsuite/gas/i386/vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/vpclmulqdq.d: Ditto. * testsuite/gas/i386/vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq.s: Ditto. opcodes/ * i386-dis.c (enum): Add PREFIX_EVEX_0F3A44. (enum): Remove VEX_LEN_0F3A44_P_2. (vex_len_table): Ditto. (enum): Remove VEX_W_0F3A44_P_2. (vew_w_table): Ditto. (prefix_table): Adjust instructions (see prefixes above). * i386-dis-evex.h (evex_table): Add new instructions (see prefixes above). * i386-gen.c (cpu_flag_init): Add VPCLMULQDQ. (bitfield_cpu_flags): Ditto. * i386-opc.h (enum): Ditto. (i386_cpu_flags): Ditto. (CpuUnused): Comment out to avoid zero-width field problem. * i386-opc.tbl (vpclmulqdq): New instruction. * i386-init.h: Regenerate. * i386-tbl.h: Ditto.
Diffstat (limited to 'opcodes/i386-dis.c')
-rw-r--r--opcodes/i386-dis.c14
1 files changed, 2 insertions, 12 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index fe9fcd90aa2..7f3b18f7092 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1701,6 +1701,7 @@ enum
PREFIX_EVEX_0F3A3F,
PREFIX_EVEX_0F3A42,
PREFIX_EVEX_0F3A43,
+ PREFIX_EVEX_0F3A44,
PREFIX_EVEX_0F3A50,
PREFIX_EVEX_0F3A51,
PREFIX_EVEX_0F3A54,
@@ -1902,7 +1903,6 @@ enum
VEX_LEN_0F3A38_P_2,
VEX_LEN_0F3A39_P_2,
VEX_LEN_0F3A41_P_2,
- VEX_LEN_0F3A44_P_2,
VEX_LEN_0F3A46_P_2,
VEX_LEN_0F3A60_P_2,
VEX_LEN_0F3A61_P_2,
@@ -2220,7 +2220,6 @@ enum
VEX_W_0F3A40_P_2,
VEX_W_0F3A41_P_2,
VEX_W_0F3A42_P_2,
- VEX_W_0F3A44_P_2,
VEX_W_0F3A46_P_2,
VEX_W_0F3A48_P_2,
VEX_W_0F3A49_P_2,
@@ -6693,7 +6692,7 @@ static const struct dis386 prefix_table[][4] = {
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A44_P_2) },
+ { "vpclmulqdq", { XM, Vex, EXx, PCLMUL }, 0 },
},
/* PREFIX_VEX_0F3A46 */
@@ -10110,11 +10109,6 @@ static const struct dis386 vex_len_table[][2] = {
{ VEX_W_TABLE (VEX_W_0F3A41_P_2) },
},
- /* VEX_LEN_0F3A44_P_2 */
- {
- { VEX_W_TABLE (VEX_W_0F3A44_P_2) },
- },
-
/* VEX_LEN_0F3A46_P_2 */
{
{ Bad_Opcode },
@@ -11429,10 +11423,6 @@ static const struct dis386 vex_w_table[][2] = {
{ "vmpsadbw", { XM, Vex, EXx, Ib }, 0 },
},
{
- /* VEX_W_0F3A44_P_2 */
- { "vpclmulqdq", { XM, Vex128, EXx, PCLMUL }, 0 },
- },
- {
/* VEX_W_0F3A46_P_2 */
{ "vperm2i128", { XM, Vex256, EXx, Ib }, 0 },
},