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authorAndre Vieira <andre.simoesdiasvieira@arm.com>2019-04-15 11:53:25 +0100
committerAndre Vieira <andre.simoesdiasvieira@arm.com>2019-04-15 12:31:42 +0100
commitf6b2b12db82f7b76c30ec389a67fbce5d2805323 (patch)
tree4a484080a464cb8286cf428719a427a7d0f60c8d /opcodes/arm-dis.c
parent1889da7048b310151d142b100678b6bd6053b548 (diff)
downloadbinutils-gdb-f6b2b12db82f7b76c30ec389a67fbce5d2805323.tar.gz
[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum. ChangeLog entries are as follows: 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel. (do_t_v8_1_branch): New switch case for bfcsel. (toU): Define. (insns): New instruction for bfcsel. (md_pcrel_from_section): New switch case for BFD_RELOC_THUMB_PCREL_BFCSEL. (md_appdy_fix): Likewise (tc_gen_reloc): Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: New. * testsuite/gas/arm/armv8_1-m-bfcsel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bfcsel.s: New. * testsuite/ld-arm/bfcsel.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instruction bfcsel. (print_insn_thumb32): Edit the switch case for %Z.
Diffstat (limited to 'opcodes/arm-dis.c')
-rw-r--r--opcodes/arm-dis.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 93e1efed8fb..988699668dd 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2758,6 +2758,8 @@ static const struct opcode32 thumb32_opcodes[] =
0xf000c001, 0xf800f001, "bfl%c\t%G, %Y"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
0xf070e001, 0xf8f0f001, "bflx%c\t%G, %16-19S"},
+ {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
+ 0xf000e001, 0xf840f001, "bfcsel\t%G, %Z, %18-21c"},
/* ARMv8-M and ARMv8-M Security Extensions instructions. */
@@ -5933,6 +5935,12 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
offset = (offset & 0x1000) ? offset - (1 << 13) : offset;
info->print_address_func (pc + 4 + offset, info);
+
+ unsigned int T = (given & 0x00020000u) >> 17;
+ unsigned int endoffset = (((given & 0x07800000) >> 23) << 1);
+ unsigned int boffset = (T == 1) ? 4 : 2;
+ func (stream, ", ");
+ func (stream, "%x", endoffset + boffset);
}
break;