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authorClaudiu Zissulescu <claziss@synopsys.com>2016-04-05 17:37:29 +0200
committerClaudiu Zissulescu <claziss@synopsys.com>2016-04-05 17:37:45 +0200
commit8ddf6b2a1384ca73a16827022da5f4423703154a (patch)
treea55da1754e6f171faa26bf3d89df048b9d4d3c9c /opcodes/arc-opc.c
parent1e5885b72e20ef874f526e77a4946b2655e6d3c3 (diff)
downloadbinutils-gdb-8ddf6b2a1384ca73a16827022da5f4423703154a.tar.gz
[ARC] Fix support for double assist instructions.
opcodes/ 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> * arc-regs.h: Add a new subclass field. Add double assist accumulator register values. * arc-tbl.h: Use DPA subclass to mark the double assist instructions. Use DPX/SPX subclas to mark the FPX instructions. * arc-opc.c (RSP): Define instead of SP. (arc_aux_regs): Add the subclass field. include/ 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (DPA, DPX, SPX): New subclass enums. (ARC_FPUDA): Define. (arc_aux_reg): Add new field. gas/ 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (is_code_density_p): Compare directly the subclass field. (is_spfp_p, is_dpfp_p, is_spfp_p): Define. (check_cpu_feature): New function. (find_opcode_match): Use check_cpu_feature function. (preprocess_operands): Likewise. (md_parse_option): Use mfpuda, mdpfp, mspfp options. * testsuite/gas/arc/tdpfp.d: New file. * testsuite/gas/arc/tfpuda.d: Likewise. * testsuite/gas/arc/tfpx.s: Likewise.
Diffstat (limited to 'opcodes/arc-opc.c')
-rw-r--r--opcodes/arc-opc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index 231ef4b5434..cecf60c39ab 100644
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -1054,11 +1054,11 @@ const struct arc_operand arc_operands[] =
#define R3 (R2 + 1)
#define R3_S (R2 + 1)
{ 2, 0, 0, ARC_OPERAND_IR, insert_r3, extract_r3 },
-#define SP (R3 + 1)
+#define RSP (R3 + 1)
#define SP_S (R3 + 1)
{ 5, 0, 0, ARC_OPERAND_IR, insert_sp, extract_sp },
-#define SPdup (SP + 1)
-#define SP_Sdup (SP + 1)
+#define SPdup (RSP + 1)
+#define SP_Sdup (RSP + 1)
{ 5, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE, insert_sp, extract_sp },
#define GP (SPdup + 1)
#define GP_S (SPdup + 1)
@@ -1496,8 +1496,8 @@ const unsigned arc_num_pseudo_insn =
const struct arc_aux_reg arc_aux_regs[] =
{
#undef DEF
-#define DEF(ADDR, NAME) \
- { ADDR, #NAME, sizeof (#NAME)-1 },
+#define DEF(ADDR, SUBCLASS, NAME) \
+ { ADDR, SUBCLASS, #NAME, sizeof (#NAME)-1 },
#include "arc-regs.h"