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authorKuan-Lin Chen <rufus@andestech.com>2017-06-08 11:54:14 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2017-06-26 18:26:40 -0700
commita6cbf936e3dce68114d28cdf60d510a3f78a6d40 (patch)
treedc4fe23922098e657bdab1a1f749a36e6bf27e9c /include
parent7211ae501eb0de1044983f2dfb00091a58fbd66c (diff)
downloadbinutils-gdb-a6cbf936e3dce68114d28cdf60d510a3f78a6d40.tar.gz
RISC-V: Use pc-relative relocation for FDE initial location
The symbol address in .eh_frame may be adjusted in _bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert a relocation whose addend symbol is in .eh_frame. Othrewise, the value may be adjusted twice. bfd/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * elfnn-riscv.c (perform_relocation): Support the new R_RISCV_32_PCREL relocation. (riscv_elf_relocate_section): Likewise. * elfxx-riscv.c (howto_table): Likewise. (riscv_reloc_map): Likewise. * bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation. * libbfd.h: Regenerate. gas/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a R_RISCV_32_PCREL relocation. include/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * elf/riscv.h (R_RISCV_32_PCREL): New.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog4
-rw-r--r--include/elf/riscv.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 91cb91fb861..243c7303cd6 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
+
+ * elf/riscv.h (R_RISCV_32_PCREL): New.
+
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
diff --git a/include/elf/riscv.h b/include/elf/riscv.h
index daa44639263..eecacf89c7e 100644
--- a/include/elf/riscv.h
+++ b/include/elf/riscv.h
@@ -87,6 +87,7 @@ START_RELOC_NUMBERS (elf_riscv_reloc_type)
RELOC_NUMBER (R_RISCV_SET8, 54)
RELOC_NUMBER (R_RISCV_SET16, 55)
RELOC_NUMBER (R_RISCV_SET32, 56)
+ RELOC_NUMBER (R_RISCV_32_PCREL, 57)
END_RELOC_NUMBERS (R_RISCV_max)
/* Processor specific flags for the ELF header e_flags field. */