This commit was manufactured by cvs2svn to create branchcagney_framebase-20030326-branchpoint

'cagney_framebase-20030326-branch'.

Sprout from cagney_lazyid-20030317-branch 2003-03-17 14:23:51 UTC nobody 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-03-26 20:19:12 UTC Daniel Jacobowitz <drow@false.org> '	* breakpoint.c (handle_gnu_4_16_catch_command, get_catch_sals)':
    bfd/ChangeLog
    bfd/archures.c
    bfd/bfd-in2.h
    bfd/coff-arm.c
    bfd/coffcode.h
    bfd/coffgen.c
    bfd/cpu-arm.c
    bfd/elf32-arm.h
    bfd/elf32-m68k.c
    bfd/elf32-xstormy16.c
    bfd/elf64-mips.c
    bfd/elf64-sparc.c
    bfd/elfn32-mips.c
    bfd/elfxx-ia64.c
    bfd/elfxx-mips.c
    bfd/elfxx-mips.h
    bfd/libbfd.h
    bfd/peXXigen.c
    bfd/reloc.c
    bfd/version.h
    gdb/ChangeLog
    gdb/MAINTAINERS
    gdb/Makefile.in
    gdb/ada-lang.c
    gdb/alpha-osf1-tdep.c
    gdb/alpha-tdep.c
    gdb/arm-linux-tdep.c
    gdb/arm-tdep.c
    gdb/arm-tdep.h
    gdb/armnbsd-tdep.c
    gdb/avr-tdep.c
    gdb/blockframe.c
    gdb/breakpoint.c
    gdb/c-lang.c
    gdb/config/i386/cygwin.mt
    gdb/config/m68k/tm-os68k.h
    gdb/config/m68k/tm-sun3.h
    gdb/config/m68k/tm-vx68.h
    gdb/config/mips/tm-irix3.h
    gdb/config/mips/tm-irix6.h
    gdb/config/mips/tm-mips.h
    gdb/config/mips/tm-tx39.h
    gdb/config/mips/tm-tx39l.h
    gdb/config/pa/tm-hppa.h
    gdb/config/sparc/tm-sp64.h
    gdb/config/sparc/tm-sparc.h
    gdb/cris-tdep.c
    gdb/d10v-tdep.c
    gdb/defs.h
    gdb/disasm.c
    gdb/doc/ChangeLog
    gdb/doc/Makefile.in
    gdb/doc/gdb.texinfo
    gdb/doc/gdbint.texinfo
    gdb/doc/observer.texi
    gdb/dummy-frame.h
    gdb/dwarf2cfi.c
    gdb/expression.h
    gdb/f-lang.c
    gdb/frame.c
    gdb/frame.h
    gdb/frv-tdep.c
    gdb/gdbarch.c
    gdb/gdbarch.h
    gdb/gdbarch.sh
    gdb/gdbserver/ChangeLog
    gdb/gdbserver/config.in
    gdb/gdbserver/configure
    gdb/gdbserver/configure.in
    gdb/gdbserver/linux-low.c
    gdb/gdbtypes.h
    gdb/h8300-tdep.c
    gdb/hppa-tdep.c
    gdb/i386-cygwin-tdep.c
    gdb/i386-interix-tdep.c
    gdb/i386-tdep.c
    gdb/ia64-tdep.c
    gdb/inferior.h
    gdb/infrun.c
    gdb/jv-lang.c
    gdb/language.c
    gdb/language.h
    gdb/m2-lang.c
    gdb/m68hc11-tdep.c
    gdb/m68k-tdep.c
    gdb/main.c
    gdb/mcore-tdep.c
    gdb/mdebugread.c
    gdb/mips-tdep.c
    gdb/mn10300-tdep.c
    gdb/ns32k-tdep.c
    gdb/objc-lang.c
    gdb/objc-lang.h
    gdb/objfiles.h
    gdb/observer.c
    gdb/osabi.c
    gdb/p-lang.c
    gdb/ppc-linux-tdep.c
    gdb/ppc-sysv-tdep.c
    gdb/ppc-tdep.h
    gdb/printcmd.c
    gdb/rs6000-tdep.c
    gdb/s390-tdep.c
    gdb/scm-lang.c
    gdb/sh-tdep.c
    gdb/signals/signals.c
    gdb/somsolib.c
    gdb/sparc-tdep.c
    gdb/testsuite/ChangeLog
    gdb/testsuite/gdb.arch/e500-abi.c
    gdb/testsuite/gdb.arch/e500-abi.exp
    gdb/testsuite/gdb.arch/e500-regs.c
    gdb/testsuite/gdb.arch/e500-regs.exp
    gdb/testsuite/gdb.asm/asm-source.exp
    gdb/testsuite/gdb.asm/m68hc11.inc
    gdb/testsuite/gdb.base/args.exp
    gdb/testsuite/gdb.base/default.exp
    gdb/testsuite/gdb.base/ending-run.exp
    gdb/testsuite/gdb.base/help.exp
    gdb/testsuite/gdb.base/watchpoint.c
    gdb/testsuite/gdb.base/watchpoint.exp
    gdb/v850-tdep.c
    gdb/valops.c
    gdb/vax-tdep.c
    gdb/version.in
    gdb/x86-64-tdep.c
    gdb/xstormy16-tdep.c
    include/ChangeLog
    include/ansidecl.h
    include/coff/ChangeLog
    include/coff/arm.h
    include/elf/ChangeLog
    include/elf/arm.h
    include/gdb/ChangeLog
    include/gdb/sim-arm.h
    include/hashtab.h
    include/opcode/ChangeLog
    include/opcode/s390.h
    libiberty/ChangeLog
    libiberty/Makefile.in
    libiberty/hashtab.c
    opcodes/ChangeLog
    opcodes/arm-dis.c
    opcodes/arm-opc.h
    opcodes/i386-dis.c
    opcodes/s390-dis.c
    opcodes/s390-mkopc.c
    opcodes/s390-opc.c
    opcodes/s390-opc.txt
    sim/arm/ChangeLog
    sim/arm/Makefile.in
    sim/arm/armcopro.c
    sim/arm/armdefs.h
    sim/arm/armemu.h
    sim/arm/arminit.c
    sim/arm/configure
    sim/arm/configure.in
    sim/arm/maverick.c
    sim/arm/wrapper.c
    sim/h8300/ChangeLog
    sim/h8300/compile.c
    sim/h8300/inst.h

1 files changed, 46 insertions, 24 deletions

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 506fd1fe7cf..2a63d22e31d 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -25,6 +25,7 @@
 
 #include "defs.h"
 #include "gdb_string.h"
+#include "gdb_assert.h"
 #include "frame.h"
 #include "inferior.h"
 #include "symtab.h"
@@ -361,23 +362,57 @@ static struct cmd_list_element *showmipscmdlist = NULL;
 
 /* A set of original names, to be used when restoring back to generic
    registers from a specific set.  */
+static char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES;
 
-char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES;
-char **mips_processor_reg_names = mips_generic_reg_names;
+/* Integer registers 0 thru 31 are handled explicitly by
+   mips_register_name().  Processor specific registers 32 and above
+   are listed in the sets of register names assigned to
+   mips_processor_reg_names.  */
+static char **mips_processor_reg_names = mips_generic_reg_names;
 
+/* Return the name of the register corresponding to REGNO.  */
 static const char *
-mips_register_name (int i)
-{
-  return mips_processor_reg_names[i];
+mips_register_name (int regno)
+{
+  /* GPR names for all ABIs other than n32/n64.  */
+  static char *mips_gpr_names[] = {
+    "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
+    "t0",   "t1",   "t2",   "t3",   "t4",   "t5",   "t6",   "t7",
+    "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
+    "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra",
+  };
+
+  /* GPR names for n32 and n64 ABIs.  */
+  static char *mips_n32_n64_gpr_names[] = {
+    "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3", 
+    "a4",   "a5",   "a6",   "a7",   "t0",   "t1",   "t2",   "t3", 
+    "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7", 
+    "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra"
+  };
+
+  enum mips_abi abi = mips_abi (current_gdbarch);
+
+  /* The MIPS integer registers are always mapped from 0 to 31.  The
+     names of the registers (which reflects the conventions regarding
+     register use) vary depending on the ABI.  */
+  if (0 <= regno && regno < 32)
+    {
+      if (abi == MIPS_ABI_N32 || abi == MIPS_ABI_N64)
+	return mips_n32_n64_gpr_names[regno];
+      else
+	return mips_gpr_names[regno];
+    }
+  else if (32 <= regno && regno < NUM_REGS)
+    return mips_processor_reg_names[regno - 32];
+  else
+    internal_error (__FILE__, __LINE__,
+		    "mips_register_name: bad register number %d", regno);
 }
+
 /* *INDENT-OFF* */
 /* Names of IDT R3041 registers.  */
 
 char *mips_r3041_reg_names[] = {
-	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3",
-	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7",
-	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7",
-	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra",
 	"sr",	"lo",	"hi",	"bad",	"cause","pc",
 	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
 	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
@@ -391,10 +426,6 @@ char *mips_r3041_reg_names[] = {
 /* Names of IDT R3051 registers.  */
 
 char *mips_r3051_reg_names[] = {
-	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3",
-	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7",
-	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7",
-	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra",
 	"sr",	"lo",	"hi",	"bad",	"cause","pc",
 	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
 	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
@@ -408,10 +439,6 @@ char *mips_r3051_reg_names[] = {
 /* Names of IDT R3081 registers.  */
 
 char *mips_r3081_reg_names[] = {
-	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3",
-	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7",
-	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7",
-	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra",
 	"sr",	"lo",	"hi",	"bad",	"cause","pc",
 	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
 	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
@@ -425,10 +452,6 @@ char *mips_r3081_reg_names[] = {
 /* Names of LSI 33k registers.  */
 
 char *mips_lsi33k_reg_names[] = {
-	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3",
-	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7",
-	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7",
-	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra",
 	"epc",	"hi",	"lo",	"sr",	"cause","badvaddr",
 	"dcic", "bpc",  "bda",  "",     "",     "",     "",      "",
 	"",     "",     "",     "",     "",     "",     "",      "",
@@ -6004,7 +6027,6 @@ mips_gdbarch_init (struct gdbarch_info info,
   /* MIPS version of CALL_DUMMY */
 
   set_gdbarch_call_dummy_p (gdbarch, 1);
-  set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
   set_gdbarch_call_dummy_address (gdbarch, mips_call_dummy_address);
   set_gdbarch_push_return_address (gdbarch, mips_push_return_address);
   set_gdbarch_deprecated_pop_frame (gdbarch, mips_pop_frame);
@@ -6024,7 +6046,7 @@ mips_gdbarch_init (struct gdbarch_info info,
   set_gdbarch_register_convert_to_raw (gdbarch, 
 				       mips_register_convert_to_raw);
 
-  set_gdbarch_frame_chain (gdbarch, mips_frame_chain);
+  set_gdbarch_deprecated_frame_chain (gdbarch, mips_frame_chain);
   set_gdbarch_frameless_function_invocation (gdbarch, 
 					     generic_frameless_function_invocation_not);
   set_gdbarch_deprecated_frame_saved_pc (gdbarch, mips_frame_saved_pc);
@@ -6057,7 +6079,7 @@ mips_gdbarch_init (struct gdbarch_info info,
   /* Hook in OS ABI-specific overrides, if they have been registered.  */
   gdbarch_init_osabi (info, gdbarch);
 
-  set_gdbarch_store_struct_return (gdbarch, mips_store_struct_return);
+  set_gdbarch_deprecated_store_struct_return (gdbarch, mips_store_struct_return);
   set_gdbarch_extract_struct_value_address (gdbarch, 
 					    mips_extract_struct_value_address);