[gdbserver] Disable conditional breakpoints on no-hardware-single-step targets

GDBserver steps over breakpoint if the condition is false, but if target
doesn't support hardware single step, the step over is very simple, if
not incorrect, in linux-arm-low.c:

/* We only place breakpoints in empty marker functions, and thread locking
   is outside of the function.  So rather than importing software single-step,
   we can just run until exit.  */
static CORE_ADDR
arm_reinsert_addr (void)
{
  struct regcache *regcache = get_thread_regcache (current_thread, 1);
  unsigned long pc;
  collect_register_by_name (regcache, "lr", &pc);
  return pc;
}

and linux-mips-low.c does the same.  GDBserver sets a breakpoint at the
return address of the current function, resume and wait the program hits
the breakpoint in order to achieve "breakpoint step over".  What if
program hits other user breakponits during this "step over"?

It is worse if the arm/thumb interworking is considered.  Nowadays,
GDBserver arm backend unconditionally inserts arm breakpoint,

  /* Define an ARM-mode breakpoint; we only set breakpoints in the C
     library, which is most likely to be ARM.  If the kernel supports
     clone events, we will never insert a breakpoint, so even a Thumb
     C library will work; so will mixing EABI/non-EABI gdbserver and
     application.  */
  (const unsigned char *) &arm_breakpoint,
  (const unsigned char *) &arm_eabi_breakpoint,

note that the comments are no longer valid as C library can be compiled
in thumb mode.

When GDBserver steps over a breakpoint in arm mode function, which
returns to thumb mode, GDBserver will insert arm mode breakpoint by
mistake and the program will crash.  GDBserver alone is unable to
determine the arm/thumb mode given a PC address.  See how GDB does
it in arm-tdep.c:arm_pc_is_thumb.

After thinking about how to teach GDBserver inserting right breakpoint
(arm or thumb) for a while, I reconsider it from a different direction
that it may be unreasonable to run target-side conditional breakpoint for
targets without hardware single step.  Pedro also pointed this out here
https://sourceware.org/ml/gdb-patches/2015-04/msg00337.html

This patch is to add a new target_ops hook
supports_conditional_breakpoints, and only reply
";ConditionalBreakpoints+" if it is true.  On linux targets,
supports_conditional_breakpoints returns true if target has hardware
single step, on other targets, (win32, lynx, nto, spu), set it to NULL,
because conditional breakpoint is a linux-specific feature.

gdb/gdbserver:

2015-05-08  Yao Qi  <yao.qi@linaro.org>

	* linux-low.c (linux_supports_conditional_breakpoints): New
	function.
	(linux_target_ops): Install new target method.
	* lynx-low.c (lynx_target_ops): Install NULL hook for
	supports_conditional_breakpoints.
	* nto-low.c (nto_target_ops): Likewise.
	* spu-low.c (spu_target_ops): Likewise.
	* win32-low.c (win32_target_ops): Likewise.
	* server.c (handle_query): Check
	target_supports_conditional_breakpoints.
	* target.h (struct target_ops) <supports_conditional_breakpoints>:
	New field.
	(target_supports_conditional_breakpoints): New macro.

1 files changed, 4 insertions, 0 deletions

diff --git a/gdb/gdbserver/nto-low.c b/gdb/gdbserver/nto-low.c
index 801d76a7c44..92767362043 100644
--- a/gdb/gdbserver/nto-low.c
+++ b/gdb/gdbserver/nto-low.c
@@ -949,6 +949,10 @@ static struct target_ops nto_target_ops = {
   NULL, /* supports_stopped_by_sw_breakpoint */
   NULL, /* stopped_by_hw_breakpoint */
   NULL, /* supports_stopped_by_hw_breakpoint */
+  /* Although nto has hardware single step, still disable this
+     feature for not, because it is implemented in linux-low.c instead
+     of in generic code.  */
+  NULL, /* supports_conditional_breakpoints */
   nto_stopped_by_watchpoint,
   nto_stopped_data_address,
   NULL, /* nto_read_offsets */