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authorAlan Hayward <alan.hayward@arm.com>2018-05-31 13:33:04 +0100
committerAlan Hayward <alan.hayward@arm.com>2018-05-31 13:33:04 +0100
commit95228a0d790f16deae3436e18f41b70fc711a5b2 (patch)
treef0634e4d78a8efaa75d9cfbc721f761f0996ee1f /gdb/aarch64-tdep.c
parent22467434fdc240e7c166f77f371909a8a07fc358 (diff)
downloadbinutils-gdb-95228a0d790f16deae3436e18f41b70fc711a5b2.tar.gz
Add Aarch64 SVE target description
No code uses the new descriptions yet. gdb/ * aarch64-linux-nat.c (aarch64_linux_read_description): Add parmeter zero. * aarch64-linux-tdep.c (aarch64_linux_core_read_description): Likewise. * aarch64-tdep.c (tdesc_aarch64_list): Add. (aarch64_read_description): Use VQ to index tdesc_aarch64_list. (aarch64_gdbarch_init): Add parmeter zero. * aarch64-tdep.h (aarch64_read_description): Add VQ parmeter. * arch/aarch64.c (aarch64_create_target_description): Check VQ. * arch/aarch64.h (aarch64_create_target_description): Add VQ. parmeter. * doc/gdb.texinfo: Describe SVE feature * features/aarch64-sve.c: New file. gdbserver/ * linux-aarch64-tdesc.c (aarch64_linux_read_description): Add null VQ.
Diffstat (limited to 'gdb/aarch64-tdep.c')
-rw-r--r--gdb/aarch64-tdep.c32
1 files changed, 23 insertions, 9 deletions
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index ef9b71c668f..793b42ae7b4 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -70,6 +70,9 @@
#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
+/* All possible aarch64 target descriptors. */
+struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1];
+
/* The standard register names, and all the valid aliases for them. */
static const struct
{
@@ -2827,18 +2830,26 @@ aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
return 1;
}
-/* Get the correct target description. */
+/* Get the correct target description for the given VQ value.
+ If VQ is zero then it is assumed SVE is not supported.
+ (It is not possible to set VQ to zero on an SVE system). */
const target_desc *
-aarch64_read_description ()
+aarch64_read_description (long vq)
{
- static target_desc *aarch64_tdesc = NULL;
- target_desc **tdesc = &aarch64_tdesc;
+ if (vq > AARCH64_MAX_SVE_VQ)
+ error (_("VQ is %ld, maximum supported value is %d"), vq,
+ AARCH64_MAX_SVE_VQ);
+
+ struct target_desc *tdesc = tdesc_aarch64_list[vq];
- if (*tdesc == NULL)
- *tdesc = aarch64_create_target_description ();
+ if (tdesc == NULL)
+ {
+ tdesc = aarch64_create_target_description (vq);
+ tdesc_aarch64_list[vq] = tdesc;
+ }
- return *tdesc;
+ return tdesc;
}
/* Initialize the current architecture based on INFO. If possible,
@@ -2864,7 +2875,10 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Ensure we always have a target descriptor. */
if (!tdesc_has_registers (tdesc))
- tdesc = aarch64_read_description ();
+ {
+ /* SVE is not yet supported. */
+ tdesc = aarch64_read_description (0);
+ }
gdb_assert (tdesc);
@@ -3072,7 +3086,7 @@ When on, AArch64 specific debugging is enabled."),
selftests::register_test ("aarch64-process-record",
selftests::aarch64_process_record_test);
selftests::record_xml_tdesc ("aarch64.xml",
- aarch64_create_target_description ());
+ aarch64_create_target_description (0));
#endif
}