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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-11-07 17:10:01 +0000 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-11-07 17:11:52 +0000 |
| commit | 8382113fdb028386a335e8dee9ac04ebc8cf04a1 (patch) | |
| tree | c2e565fa25ec35788e5b2dbc3212629a3218ee64 /gas/doc | |
| parent | eb5bbc482128b08d2ee8a2470951a74d8351146f (diff) | |
| download | binutils-gdb-8382113fdb028386a335e8dee9ac04ebc8cf04a1.tar.gz | |
[binutils][aarch64] Matrix Multiply extension enablement [8/X]
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch introduces the Matrix Multiply (Int8, F32, F64) extensions
to the aarch64 backend.
The following instructions are added: {s/u}mmla, usmmla, {us/su}dot,
fmmla, ld1rob, ld1roh, d1row, ld1rod, uzip{1/2}, trn{1/2}.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* config/tc-aarch64.c: Add new arch fetures to suppport the mm extension.
(parse_operands): Add new operand.
* testsuite/gas/aarch64/i8mm.s: New test.
* testsuite/gas/aarch64/i8mm.d: New test.
* testsuite/gas/aarch64/f32mm.s: New test.
* testsuite/gas/aarch64/f32mm.d: New test.
* testsuite/gas/aarch64/f64mm.s: New test.
* testsuite/gas/aarch64/f64mm.d: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.s: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.d: New test.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_I8MM): New.
(AARCH64_FEATURE_F32MM): New.
(AARCH64_FEATURE_F64MM): New.
(AARCH64_OPND_SVE_ADDR_RI_S4x32): New.
(enum aarch64_insn_class): Add new instruction class "aarch64_misc" for
instructions that do not require special handling.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* aarch64-tbl.h (aarch64_feature_i8mm_sve, aarch64_feature_f32mm_sve,
aarch64_feature_f64mm_sve, aarch64_feature_i8mm, aarch64_feature_f32mm,
aarch64_feature_f64mm): New feature sets.
(INT8MATMUL_INSN, F64MATMUL_SVE_INSN, F64MATMUL_INSN,
F32MATMUL_SVE_INSN, F32MATMUL_INSN): New macros to define matrix multiply
instructions.
(I8MM_SVE, F32MM_SVE, F64MM_SVE, I8MM, F32MM, F64MM): New feature set
macros.
(QL_MMLA64, OP_SVE_SBB): New qualifiers.
(OP_SVE_QQQ): New qualifier.
(INT8MATMUL_SVE_INSNC, F64MATMUL_SVE_INSNC,
F32MATMUL_SVE_INSNC): New feature set for bfloat16 instructions to support
the movprfx constraint.
(aarch64_opcode_table): Support for SVE_ADDR_RI_S4x32.
(aarch64_opcode_table): Define new instructions smmla,
ummla, usmmla, usdot, sudot, fmmla, ld1rob, ld1roh, ld1row, ld1rod
uzip{1/2}, trn{1/2}.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_SVE_ADDR_RI_S4x32.
(aarch64_print_operand): Handle AARCH64_OPND_SVE_ADDR_RI_S4x32.
* aarch64-dis-2.c (aarch64_opcode_lookup_1, aarch64_find_next_opcode):
Account for new instructions.
* opcodes/aarch64-asm-2.c (aarch64_insert_operand): Support the new
S4x32 operand.
* aarch64-opc-2.c (aarch64_operands): Support the new S4x32 operand.
Regression tested on arm-none-eabi.
Is it ok for trunk?
Regards,
Mihail
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-aarch64.texi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 4cb94872daa..056f23decc1 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -144,6 +144,12 @@ automatically cause those extensions to be disabled. @multitable @columnfractions .12 .17 .17 .54 @headitem Extension @tab Minimum Architecture @tab Enabled by default @tab Description +@item @code{i8mm} @tab ARMv8.2-A @tab ARMv8.6-A or later + @tab Enable Int8 Matrix Multiply extension. +@item @code{f32mm} @tab ARMv8.2-A @tab No + @tab Enable F32 Matrix Multiply extension. +@item @code{f64mm} @tab ARMv8.2-A @tab No + @tab Enable F64 Matrix Multiply extension. @item @code{bf16} @tab ARMv8.2-A @tab ARMv8.6-A or later @tab Enable BFloat16 extension. @item @code{compnum} @tab ARMv8.2-A @tab ARMv8.3-A or later |