diff options
| author | Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com> | 2020-05-04 13:05:42 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2020-05-04 13:07:45 +0100 |
| commit | fe05f369f0df7cad0a6500b79879addaad2e364d (patch) | |
| tree | f853042df0e8d3aa491deb65bdfe6021f620ff96 | |
| parent | 4706679daca21b5d637afaf5b55858b26f0f8c16 (diff) | |
| download | binutils-gdb-fe05f369f0df7cad0a6500b79879addaad2e364d.tar.gz | |
gas: PR 25863: Fix scalar vmul inside it block when assembling for MVE
This fixes PR 25863 by fixing the condition in the parsing of vmul in
do_mve_vmull. It also simplifies the code in there fixing latent issues that
would lead to NEON code being accepted when it shouldn't.
gas/ChangeLog:
2020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR gas/25863
* config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
* testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
* testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
| -rw-r--r-- | gas/ChangeLog | 7 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 12 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/mve-scalar-vmul-it.d | 11 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/mve-scalar-vmul-it.s | 5 |
4 files changed, 26 insertions, 9 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 630289cb67b..20ae8178340 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR gas/25863 + * config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul. + * testsuite/gas/arm/mve-scalar-vmult-it.d: New test. + * testsuite/gas/arm/mve-scalar-vmult-it.s: New test. + 2020-05-04 Nick Clifton <nickc@redhat.com> PR 25917 diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index f2a55ab3c1a..12ca245cbc7 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -18273,19 +18273,13 @@ do_mve_vmull (void) enum neon_shape rs = neon_select_shape (NS_HHH, NS_FFF, NS_DDD, NS_DDS, NS_QQS, NS_QQQ, NS_QQR, NS_NULL); - if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext) - && inst.cond == COND_ALWAYS + if (inst.cond == COND_ALWAYS && ((unsigned)inst.instruction) == M_MNEM_vmullt) { + if (rs == NS_QQQ) { - - struct neon_type_el et = neon_check_type (3, rs, N_EQK , N_EQK, - N_SUF_32 | N_F64 | N_P8 - | N_P16 | N_I_MVE | N_KEY); - if (((et.type == NT_poly) && et.size == 8 - && ARM_CPU_IS_ANY (cpu_variant)) - || (et.type == NT_integer) || (et.type == NT_float)) + if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext)) goto neon_vmul; } else diff --git a/gas/testsuite/gas/arm/mve-scalar-vmul-it.d b/gas/testsuite/gas/arm/mve-scalar-vmul-it.d new file mode 100644 index 00000000000..f4564a5e80b --- /dev/null +++ b/gas/testsuite/gas/arm/mve-scalar-vmul-it.d @@ -0,0 +1,11 @@ +# name: Armv8.1-M Mainline scalar vmul instructions in it blocks (with MVE) +# as: -march=armv8.1-m.main+mve.fp+fp.dp +# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main + +.*: +file format .*arm.* + +Disassembly of section .text: +[^>]*> bfbc itt lt +[^>]*> ee20 0a81 vmullt.f32 s0, s1, s2 +[^>]*> ee21 0b02 vmullt.f64 d0, d1, d2 +#... diff --git a/gas/testsuite/gas/arm/mve-scalar-vmul-it.s b/gas/testsuite/gas/arm/mve-scalar-vmul-it.s new file mode 100644 index 00000000000..e6c24acdfcc --- /dev/null +++ b/gas/testsuite/gas/arm/mve-scalar-vmul-it.s @@ -0,0 +1,5 @@ +.syntax unified +.text +itt lt +vmullt.f32 s0, s1, s2 +vmullt.f64 d0, d1, d2 |