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authorLuis Machado <luis.machado@arm.com>2022-07-28 02:41:23 +0100
committerLuis Machado <luis.machado@arm.com>2022-08-01 08:57:21 +0100
commit237f171e5e877aecd3655d1f363769cff3b108c8 (patch)
tree91808918520a214f9161549e435356d34db26bd5
parent6198c2216f4474302f5d37cd1fd28e56031d66e4 (diff)
downloadbinutils-gdb-237f171e5e877aecd3655d1f363769cff3b108c8.tar.gz
[Morello GDB] Fix AUXV reading/parsing for corefiles and remote targets
The last fix to enable GDB to read pure-cap AUXV information (with 128-bit entries) only handled native GDB. The following patch enables the same logic for corefiles and remote targets.
-rw-r--r--gdb/aarch64-linux-nat.c62
-rw-r--r--gdb/aarch64-linux-tdep.c59
2 files changed, 59 insertions, 62 deletions
diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index 3ad838ce3b4..d5cf037d47b 100644
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -106,11 +106,6 @@ public:
gdb::byte_vector read_capability (CORE_ADDR addr) override;
bool write_capability (CORE_ADDR addr,
gdb::array_view<const gdb_byte> buffer) override;
- /* Required to differentiate Morello AUXV entries, since they are 128-bit
- in size. */
- int auxv_parse (gdb_byte **readptr,
- gdb_byte *endptr, CORE_ADDR *typep, CORE_ADDR *valp)
- override;
};
static aarch64_linux_nat_target the_aarch64_linux_nat_target;
@@ -1138,63 +1133,6 @@ aarch64_linux_nat_target::write_capability (CORE_ADDR addr,
return true;
}
-/* Implement the "auxv_parse" target_ops method. */
-
-int
-aarch64_linux_nat_target::auxv_parse (gdb_byte **readptr,
- gdb_byte *endptr, CORE_ADDR *typep,
- CORE_ADDR *valp)
-{
- /* Do some sanity checks first. */
- if (endptr == *readptr)
- return 0;
-
- if (endptr - *readptr < 16)
- return -1;
-
- size_t offset_to_skip = 0;
- enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
-
- /* We're dealing with three different AUXV layouts:
-
- A - The regular AArch64 format: Each type entry is 64-bit and each value
- is 64-bit. This is also the case for Morello Hybrid binaries.
- B - The Morello pure capability format with libshim: This is a compability
- layout and it keeps the 64-bit types and 64-bit values.
- C - The Morello pure capability format without libshim: This layout has
- 64-bit types followed by 64-bit padding. The value is 128-bit.
-
- We need to determine what layout we have, so we can read the data
- correctly.
-
- The easiest way to tell the difference is to assume 8-byte entries and
- look for any types outside the range [AT_NULL, AT_MINSIGSTKSZ]. If we
- find one such type, assume that we have layout C. Otherwise we have
- layouts A or B. */
- gdb_byte *ptr = *readptr;
- while (ptr < endptr)
- {
- CORE_ADDR type = extract_unsigned_integer (ptr, 8, byte_order);
- if (type > AT_MINSIGSTKSZ)
- {
- offset_to_skip = 8;
- break;
- }
- ptr += 16;
- }
-
- /* Now we know what the layout looks like. Read the data. */
- ptr = *readptr;
- *typep = extract_unsigned_integer (ptr, 8, byte_order);
- ptr += 8 + offset_to_skip;
- *valp = extract_unsigned_integer (ptr, 8, byte_order);
- ptr += 8 + offset_to_skip;
-
- *readptr = ptr;
-
- return 1;
-}
-
/* Define AArch64 maintenance commands. */
static void
diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c
index dd92b31fd59..06497e29161 100644
--- a/gdb/aarch64-linux-tdep.c
+++ b/gdb/aarch64-linux-tdep.c
@@ -1880,6 +1880,63 @@ maint_set_capability_in_memory_cmd (const char *args, int from_tty)
perror_with_name (_("Failed to set capability in memory."));
}
+/* Implement the "gdbarch_auxv_parse" hook. */
+
+static int
+aarch64_linux_auxv_parse (gdbarch *gdbarch, gdb_byte **readptr,
+ gdb_byte *endptr, CORE_ADDR *typep,
+ CORE_ADDR *valp)
+{
+ /* Do some sanity checks first. */
+ if (endptr == *readptr)
+ return 0;
+
+ if (endptr - *readptr < 16)
+ return -1;
+
+ size_t offset_to_skip = 0;
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
+ /* We're dealing with three different AUXV layouts:
+
+ A - The regular AArch64 format: Each type entry is 64-bit and each value
+ is 64-bit. This is also the case for Morello Hybrid binaries.
+ B - The Morello pure capability format with libshim: This is a compability
+ layout and it keeps the 64-bit types and 64-bit values.
+ C - The Morello pure capability format without libshim: This layout has
+ 64-bit types followed by 64-bit padding. The value is 128-bit.
+
+ We need to determine what layout we have, so we can read the data
+ correctly.
+
+ The easiest way to tell the difference is to assume 8-byte entries and
+ look for any types outside the range [AT_NULL, AT_MINSIGSTKSZ]. If we
+ find one such type, assume that we have layout C. Otherwise we have
+ layouts A or B. */
+ gdb_byte *ptr = *readptr;
+ while (ptr < endptr)
+ {
+ CORE_ADDR type = extract_unsigned_integer (ptr, 8, byte_order);
+ if (type > AT_MINSIGSTKSZ)
+ {
+ offset_to_skip = 8;
+ break;
+ }
+ ptr += 16;
+ }
+
+ /* Now we know what the layout looks like. Read the data. */
+ ptr = *readptr;
+ *typep = extract_unsigned_integer (ptr, 8, byte_order);
+ ptr += 8 + offset_to_skip;
+ *valp = extract_unsigned_integer (ptr, 8, byte_order);
+ ptr += 8 + offset_to_skip;
+
+ *readptr = ptr;
+
+ return 1;
+}
+
static void
aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
@@ -2105,6 +2162,8 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
aarch64_displaced_step_hw_singlestep);
set_gdbarch_gcc_target_options (gdbarch, aarch64_linux_gcc_target_options);
+ /* Required for Morello. */
+ set_gdbarch_auxv_parse (gdbarch, aarch64_linux_auxv_parse);
if (tdep->has_capability ())
{