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authorTamar Christina <tamar.christina@arm.com>2019-01-25 15:50:01 +0000
committerTamar Christina <tamar.christina@arm.com>2019-01-25 15:51:26 +0000
commitd6a865ea38d7716b1027ce819023d7d418e6e36c (patch)
tree218e82f07af51da6a1148acb63e516a40cb4dd12
parentaaebbe8750067d8baf6008cfd942ac1828945171 (diff)
downloadbinutils-gdb-d6a865ea38d7716b1027ce819023d7d418e6e36c.tar.gz
AArch64: Add missing changelog for Update encodings for stg, st2g, stzg and st2zg
(cherry picked from commit e10620d3b96a725c4752198cb3c7c00ea21b42b4)
-rw-r--r--gas/ChangeLog10
-rw-r--r--opcodes/ChangeLog9
2 files changed, 19 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 064a88878b7..554d85c1d1b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,15 @@
2019-01-25 Sudakshina Das <sudi.das@arm.com>
+ * config/tc-aarch64.c (warn_unpredictable_ldst): Exempt
+ stg, st2g, stzg and stz2g from Xt == Xn with writeback warning.
+ * testsuite/gas/aarch64/armv8_5-a-memtag.d: Change tests for
+ stg, stzg, st2g and stz2g.
+ * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+
+2019-01-25 Sudakshina Das <sudi.das@arm.com>
+
* testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for stzgm.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b66f9958158..d7c344ffa29 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,14 @@
2019-01-25 Sudakshina Das <sudi.das@arm.com>
+ * aarch64-tbl.h (QL_LDST_AT): Update macro.
+ (aarch64_opcode): Change encoding for stg, stzg
+ st2g and st2zg.
+ * aarch64-asm-2.c: Regenerated.
+ * aarch64-dis-2.c: Regenerated.
+ * aarch64-opc-2.c: Regenerated.
+
+2019-01-25 Sudakshina Das <sudi.das@arm.com>
+
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.