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authorRuiling Song <ruiling.song@intel.com>2014-07-02 12:39:05 +0800
committerZhigang Gong <zhigang.gong@intel.com>2014-07-02 13:47:30 +0800
commit5bf2f9581a6d60fdb5a9ac8cb706c85488fb7aad (patch)
tree71279e98e0ef8c0447226961f9dbde26b0a93127
parentb4e85566429a987923173a49262607a509054075 (diff)
downloadbeignet-5bf2f9581a6d60fdb5a9ac8cb706c85488fb7aad.tar.gz
GBE: Check family of spilled register correctly.
We only support DWORD QWORD register-spill currently. So if we cannot spill a register, simply return false instead of give an assert. Signed-off-by: Ruiling Song <ruiling.song@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
-rw-r--r--backend/src/backend/gen_reg_allocation.cpp13
1 files changed, 6 insertions, 7 deletions
diff --git a/backend/src/backend/gen_reg_allocation.cpp b/backend/src/backend/gen_reg_allocation.cpp
index 02e0cdeb..b7fbc93a 100644
--- a/backend/src/backend/gen_reg_allocation.cpp
+++ b/backend/src/backend/gen_reg_allocation.cpp
@@ -256,8 +256,6 @@ namespace gbe
getRegAttrib(reg, regSize, &family);
uint32_t grfOffset = allocateReg(interval, regSize, regSize);
if (grfOffset == 0) {
- /* this register is going to be spilled. */
- GBE_ASSERT(!(reservedReg && family != ir::FAMILY_DWORD && family != ir::FAMILY_QWORD));
return false;
}
insertNewReg(reg, grfOffset);
@@ -685,12 +683,7 @@ namespace gbe
const uint32_t maxAlignment = ctx.getSimdWidth()/8*GEN_REG_SIZE;
const uint32_t grfOffset = allocateReg(interval, size, maxAlignment);
if(grfOffset == 0) {
- ir::RegisterFamily family;
for(int i = vector->regNum-1; i >= 0; i--) {
- family = ctx.sel->getRegisterFamily(vector->reg[i].reg());
- // we currently only support DWORD/QWORD spill
- if(family != ir::FAMILY_DWORD && family != ir::FAMILY_QWORD)
- return false;
if (!spillReg(vector->reg[i].reg()))
return false;
}
@@ -830,6 +823,12 @@ namespace gbe
if (interval.reg.value() >= ctx.getFunction().getRegisterFile().regNum() &&
ctx.getSimdWidth() == 16)
return false;
+
+ ir::RegisterFamily family = ctx.sel->getRegisterFamily(interval.reg);
+ // we currently only support DWORD/QWORD spill
+ if(family != ir::FAMILY_DWORD && family != ir::FAMILY_QWORD)
+ return false;
+
SpillRegTag spillTag;
spillTag.isTmpReg = interval.maxID == interval.minID;
spillTag.addr = -1;