From 226b6f9a3f59785296f29623c4cbabe85e7d1cba Mon Sep 17 00:00:00 2001 From: Kevin Brace Date: Tue, 30 Jul 2019 16:37:57 -0700 Subject: Stop accessing SR12 and SR13 The access to these extended VGA sequencer registers appears to come from the code for Cirrus Logic Alpine family. Laguna family does not use these registers according to Laguna VisualMedia Accelerators Family CL-GD546X Software Technical Reference Manual, Second Edition. Signed-off-by: Kevin Brace --- src/lg.h | 2 -- src/lg_driver.c | 6 ------ 2 files changed, 8 deletions(-) diff --git a/src/lg.h b/src/lg.h index fa716d6..3f5dcdf 100644 --- a/src/lg.h +++ b/src/lg.h @@ -31,8 +31,6 @@ enum { /* SR regs */ SR07, SR0E, - SR12, - SR13, SR1E, /* Must be last! */ LG_LAST_REG diff --git a/src/lg_driver.c b/src/lg_driver.c index 95886b0..3af8432 100644 --- a/src/lg_driver.c +++ b/src/lg_driver.c @@ -1052,10 +1052,6 @@ LgSave(ScrnInfoPtr pScrn) pCir->chip.lg->SavedReg.ExtVga[SR07] = hwp->readSeq(hwp, 0x07); pCir->chip.lg->ModeReg.ExtVga[SR0E] = pCir->chip.lg->SavedReg.ExtVga[SR0E] = hwp->readSeq(hwp, 0x0E); - pCir->chip.lg->ModeReg.ExtVga[SR12] = - pCir->chip.lg->SavedReg.ExtVga[SR12] = hwp->readSeq(hwp, 0x12); - pCir->chip.lg->ModeReg.ExtVga[SR13] = - pCir->chip.lg->SavedReg.ExtVga[SR13] = hwp->readSeq(hwp, 0x13); pCir->chip.lg->ModeReg.ExtVga[SR1E] = pCir->chip.lg->SavedReg.ExtVga[SR1E] = hwp->readSeq(hwp, 0x1E); @@ -1530,8 +1526,6 @@ LgRestoreLgRegs(ScrnInfoPtr pScrn, LgRegPtr lgReg) hwp->writeSeq(hwp, 0x07, lgReg->ExtVga[SR07]); hwp->writeSeq(hwp, 0x0E, lgReg->ExtVga[SR0E]); - hwp->writeSeq(hwp, 0x12, lgReg->ExtVga[SR12]); - hwp->writeSeq(hwp, 0x13, lgReg->ExtVga[SR13]); hwp->writeSeq(hwp, 0x1E, lgReg->ExtVga[SR1E]); memww(0xC0, lgReg->FORMAT); -- cgit v1.2.1