From 4139b170377b357dbbbb86190cc181cce0edc91e Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Thu, 30 Mar 2017 09:52:38 +0530 Subject: armv8: ls1043ardb: SPL size reduction Using changes in this patch we were able to reduce approx 10k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1043ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. 5. Remove I2C driver support from SPL in case of LS1043ARDB. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- include/configs/ls1043a_common.h | 37 +++++++++++++++++++++++++++++++++++++ include/configs/ls1043ardb.h | 14 ++++++++++++++ 2 files changed, 51 insertions(+) (limited to 'include') diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 46d54a0f0d..23b7ef7b82 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -7,6 +7,25 @@ #ifndef __LS1043A_COMMON_H #define __LS1043A_COMMON_H +/* SPL build */ +#ifdef CONFIG_SPL_BUILD +#define SPL_NO_FMAN +#define SPL_NO_DSPI +#define SPL_NO_PCIE +#define SPL_NO_ENV +#define SPL_NO_MISC +#define SPL_NO_USB +#define SPL_NO_SATA +#define SPL_NO_QE +#define SPL_NO_EEPROM +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) +#define SPL_NO_MMC +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT)) +#define SPL_NO_IFC +#endif + #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE #define CONFIG_LS1043A @@ -83,6 +102,7 @@ #endif /* IFC */ +#ifndef SPL_NO_IFC #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_IFC /* @@ -103,6 +123,7 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif #endif +#endif /* I2C */ #define CONFIG_SYS_I2C @@ -113,6 +134,7 @@ #define CONFIG_SYS_I2C_MXC_I2C4 /* PCIe */ +#ifndef SPL_NO_PCIE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -122,17 +144,23 @@ #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI #endif +#endif /* Command line configuration */ +#ifndef SPL_NO_ENV #define CONFIG_CMD_ENV +#endif /* MMC */ +#ifndef SPL_NO_MMC #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif +#endif /* DSPI */ +#ifndef SPL_NO_DSPI #define CONFIG_FSL_DSPI #ifdef CONFIG_FSL_DSPI #define CONFIG_DM_SPI_FLASH @@ -144,8 +172,10 @@ #define CONFIG_SF_DEFAULT_CS 0 #endif #endif +#endif /* FMan ucode */ +#ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 @@ -177,6 +207,7 @@ #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif +#endif /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) @@ -184,6 +215,7 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 +#ifndef SPL_NO_MISC #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot)," \ "5m(kernel),1m(dtb),9m(file_system)" @@ -224,6 +256,7 @@ #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #endif +#endif /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ @@ -231,7 +264,11 @@ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_LONGHELP + +#ifndef SPL_NO_MISC #define CONFIG_CMDLINE_EDITING 1 +#endif + #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index f185380ae3..ea929d1da0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -90,7 +90,9 @@ /* * NAND Flash Definitions */ +#ifndef SPL_NO_IFC #define CONFIG_NAND_FSL_IFC +#endif #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -213,6 +215,7 @@ #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3 /* EEPROM */ +#ifndef SPL_NO_EEPROM #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 @@ -220,11 +223,14 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#endif /* * Environment */ +#ifndef SPL_NO_ENV #define CONFIG_ENV_OVERWRITE +#endif #if defined(CONFIG_NAND_BOOT) #define CONFIG_ENV_IS_IN_NAND @@ -243,6 +249,7 @@ #endif /* FMan */ +#ifndef SPL_NO_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET #define CONFIG_PHYLIB @@ -266,23 +273,29 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif +#endif /* QE */ +#ifndef SPL_NO_QE #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE #endif #define CONFIG_SYS_QE_FW_ADDR 0x60600000 +#endif /* USB */ +#ifndef SPL_NO_USB #define CONFIG_HAS_FSL_XHCI_USB #ifdef CONFIG_HAS_FSL_XHCI_USB #define CONFIG_USB_XHCI_FSL #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif +#endif /* SATA */ +#ifndef SPL_NO_SATA #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_CMD_SCSI @@ -299,6 +312,7 @@ #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#endif #include -- cgit v1.2.1 From a52ff334c5b16e71a58fb75f35394761e645f7e9 Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Thu, 30 Mar 2017 09:53:13 +0530 Subject: armv8: ls1046ardb: SPL size reduction Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- include/configs/ls1046a_common.h | 32 ++++++++++++++++++++++++++++++++ include/configs/ls1046ardb.h | 15 ++++++++++++++- 2 files changed, 46 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index cb792961b8..164a5f3884 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -7,6 +7,23 @@ #ifndef __LS1046A_COMMON_H #define __LS1046A_COMMON_H +/* SPL build */ +#ifdef CONFIG_SPL_BUILD +#define SPL_NO_QBMAN +#define SPL_NO_FMAN +#define SPL_NO_ENV +#define SPL_NO_MISC +#define SPL_NO_QSPI +#define SPL_NO_USB +#define SPL_NO_SATA +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) +#define SPL_NO_MMC +#endif +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT)) +#define SPL_NO_IFC +#endif + #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE #define CONFIG_MP @@ -110,20 +127,28 @@ #define CONFIG_SYS_I2C_MXC_I2C4 /* Command line configuration */ +#ifndef SPL_NO_ENV #define CONFIG_CMD_ENV +#endif /* MMC */ +#ifndef SPL_NO_MMC #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif +#endif +#ifndef SPL_NO_QBMAN #define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ +#endif /* FMan ucode */ +#ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 +#endif #ifdef CONFIG_SD_BOOT /* @@ -157,6 +182,7 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 +#ifndef SPL_NO_MISC /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ @@ -174,13 +200,19 @@ #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500 " \ MTDPARTS_DEFAULT +#endif + /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_LONGHELP + +#ifndef SPL_NO_MISC #define CONFIG_CMDLINE_EDITING 1 +#endif + #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 2141b8299a..e368072c28 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -51,13 +51,14 @@ #endif #endif +#ifndef SPL_NO_IFC /* IFC */ #define CONFIG_FSL_IFC - /* * NAND Flash Definitions */ #define CONFIG_NAND_FSL_IFC +#endif #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -161,7 +162,9 @@ /* * Environment */ +#ifndef SPL_NO_ENV #define CONFIG_ENV_OVERWRITE +#endif #if defined(CONFIG_SD_BOOT) #define CONFIG_ENV_IS_IN_MMC @@ -176,6 +179,7 @@ #endif /* FMan */ +#ifndef SPL_NO_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET #define CONFIG_PHYLIB @@ -196,16 +200,20 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif +#endif /* QSPI device */ +#ifndef SPL_NO_QSPI #ifdef CONFIG_FSL_QSPI #define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 #define CONFIG_SPI_FLASH_BAR #endif +#endif /* USB */ +#ifndef SPL_NO_USB #define CONFIG_HAS_FSL_XHCI_USB #ifdef CONFIG_HAS_FSL_XHCI_USB #define CONFIG_USB_XHCI_HCD @@ -216,8 +224,10 @@ #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE #endif +#endif /* SATA */ +#ifndef SPL_NO_SATA #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT @@ -229,7 +239,9 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#endif +#ifndef SPL_NO_MISC #define CONFIG_BOOTCOMMAND "sf probe 0:0;sf read $kernel_load" \ "$kernel_start $kernel_size;" \ "bootm $kernel_load" @@ -238,5 +250,6 @@ "15m(u-boot),48m(kernel.itb);" \ "7e800000.flash:16m(nand_uboot)," \ "48m(nand_kernel),448m(nand_free)" +#endif #endif /* __LS1046ARDB_H__ */ -- cgit v1.2.1 From f7244f2c4815aa80a7cd7e9ceaee1969a16acd47 Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:18 +0530 Subject: armv8: LS1046ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target. Also enable sec init. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Reviewed-by: York Sun --- include/configs/ls1046ardb.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index e368072c28..67ee62608c 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -252,4 +252,6 @@ "48m(nand_kernel),448m(nand_free)" #endif +#include + #endif /* __LS1046ARDB_H__ */ -- cgit v1.2.1 From 11d14bfb756331bc26ee6ea118f9c1bd8aa0fc65 Mon Sep 17 00:00:00 2001 From: Vinitha Pillai-B57223 Date: Thu, 23 Mar 2017 13:48:20 +0530 Subject: armv8: LS1012ARDB: Add QSPI Secure Boot target Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg Signed-off-by: Vinitha Pillai Reviewed-by: Ruchika Gupta Reviewed-by: York Sun --- include/configs/ls1012a_common.h | 2 -- include/configs/ls1012ardb.h | 3 +++ 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 1a0c7f8e5f..09f890d55c 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -123,6 +123,4 @@ #define CONFIG_PANIC_HANG #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ -#include - #endif /* __LS1012A_COMMON_H */ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 70d3a71eb3..276fe1050c 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -74,4 +74,7 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff + +#include + #endif /* __LS1012ARDB_H__ */ -- cgit v1.2.1 From 70f9661ca9130c446c146f582046024eddaaee31 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Mon, 17 Apr 2017 18:07:17 +0530 Subject: arm: ls1043ardb: Add SD secure boot target - Add SD secure boot target for ls1043ardb. - Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream ID and corresponding stream ID in SMMU. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for secure boto header. - Error messages during SPL boot are limited to error code numbers instead of strings to reduce the size of SPL image. Signed-off-by: Vinitha Pillai-B57223 Signed-off-by: Sumit Garg Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- include/configs/ls1043a_common.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 23b7ef7b82..c63c5e3403 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -71,7 +71,7 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x10000000 -#define CONFIG_SPL_MAX_SIZE 0x1d000 +#define CONFIG_SPL_MAX_SIZE 0x17000 #define CONFIG_SPL_STACK 0x1001e000 #define CONFIG_SPL_PAD_TO 0x1d000 @@ -80,7 +80,19 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 -#define CONFIG_SYS_MONITOR_LEN 0xa0000 + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_SECURE_BOOT */ #endif /* NAND SPL */ -- cgit v1.2.1 From 762f92a60e1f02c2597500766f86e4e3fb145b21 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Mon, 17 Apr 2017 18:07:18 +0530 Subject: arm: ls1043ardb: Add NAND secure boot target Add NAND secure boot target for ls1043ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript from NAND to DDR. Offsets for Bootscript on NAND and DDR have been also defined. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- include/config_fsl_chain_trust.h | 9 +++++---- include/configs/ls1043a_common.h | 18 +++++++++++++++++- include/configs/ls1043ardb.h | 2 +- 3 files changed, 23 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h index eb45e9851f..40d323e004 100644 --- a/include/config_fsl_chain_trust.h +++ b/include/config_fsl_chain_trust.h @@ -81,17 +81,18 @@ "setenv bs_size " __stringify(CONFIG_BS_SIZE)";" /* For secure boot flow, default environment used will be used */ -#if defined(CONFIG_SYS_RAMBOOT) -#if defined(CONFIG_RAMBOOT_NAND) +#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_NAND_BOOT) || \ + defined(CONFIG_SD_BOOT) +#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_NAND_BOOT) #define CONFIG_BS_COPY_CMD \ "nand read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \ "nand read $bs_ram $bs_device $bs_size ;" -#endif /* CONFIG_RAMBOOT_NAND */ #elif defined(CONFIG_SD_BOOT) #define CONFIG_BS_COPY_CMD \ "mmc read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \ "mmc read $bs_ram $bs_device $bs_size ;" -#else /* CONFIG_SD_BOOT */ +#endif +#else #define CONFIG_BS_COPY_CMD \ "cp.b $bs_hdr_device $bs_hdr_ram $bs_hdr_size ;" \ "cp.b $bs_device $bs_ram $bs_size ;" diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index c63c5e3403..7b1d9bbbed 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -110,7 +110,23 @@ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 -#define CONFIG_SYS_MONITOR_LEN 0xa0000 + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +#endif /* ifdef CONFIG_SECURE_BOOT */ + +#ifdef CONFIG_U_BOOT_HDR_SIZE +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ + #endif /* IFC */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index ea929d1da0..5e570cd5e8 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -136,7 +136,7 @@ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO -#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (1024 << 10) #endif /* -- cgit v1.2.1 From 511fc86d0b1b603532056c663c22b91056908755 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Mon, 17 Apr 2017 18:07:19 +0530 Subject: arm: ls1046ardb: Add SD secure boot target - Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: Vinitha Pillai Signed-off-by: Sumit Garg Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- include/configs/ls1046a_common.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 164a5f3884..957ffd3634 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -85,7 +85,19 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SYS_MONITOR_LEN 0xa0000 + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_SECURE_BOOT */ #endif /* NAND SPL */ @@ -105,7 +117,7 @@ #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x10000000 -#define CONFIG_SPL_MAX_SIZE 0x1d000 /* 116 KiB */ +#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */ #define CONFIG_SPL_STACK 0x1001f000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -- cgit v1.2.1 From 4a3ab193222d495ad55b3902fde2654489ad767b Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 27 Mar 2017 11:41:01 -0700 Subject: armv8: ls2080a: Drop macro CONFIG_LS2080A Use CONFIG_ARCH_LS2080A instead. Signed-off-by: York Sun --- include/linux/usb/xhci-fsl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index 1fa31613bb..23e5939f3b 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -58,7 +58,7 @@ struct fsl_xhci { #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -- cgit v1.2.1 From c1303bfd7e14f5ee451f6aafeeca2d87ac1255d6 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 27 Mar 2017 11:41:02 -0700 Subject: armv8: ls1043a: Drop macro CONFIG_LS1043A Use CONFIG_ARCH_LS1043A instead. Signed-off-by: York Sun --- include/configs/ls1043a_common.h | 1 - include/linux/usb/xhci-fsl.h | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 7b1d9bbbed..e26924877d 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -28,7 +28,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_LS1043A #define CONFIG_MP #define CONFIG_GICV2 diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index 23e5939f3b..e0dff30f38 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -62,7 +62,7 @@ struct fsl_xhci { #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#elif defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_XHCI_USB3_ADDR -- cgit v1.2.1 From 73fb583829efb296ecdddb08c426e2261cb84d0a Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 27 Mar 2017 11:41:03 -0700 Subject: armv7: ls1021a: Drop macro CONFIG_LS102XA Use CONFIG_ARCH_LS1021A instead. Signed-off-by: York Sun --- include/configs/ls1021aiot.h | 2 -- include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atwr.h | 2 -- include/fsl_errata.h | 4 ++-- include/linux/immap_qe.h | 2 +- include/linux/usb/xhci-fsl.h | 2 +- include/tsec.h | 2 +- include/usb/ehci-ci.h | 2 +- 8 files changed, 6 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index d8bbc802d2..35d17b96f4 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_LS102XA - #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_SYS_FSL_CLK diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 97b81274b0..c3224c8c3f 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_LS102XA - #define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a60b4b2990..1d0b4698bb 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_LS102XA - #define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/fsl_errata.h b/include/fsl_errata.h index 8441f91029..89051aa741 100644 --- a/include/fsl_errata.h +++ b/include/fsl_errata.h @@ -10,7 +10,7 @@ #include #if defined(CONFIG_PPC) #include -#elif defined(CONFIG_LS102XA) +#elif defined(CONFIG_ARCH_LS1021A) #include #elif defined(CONFIG_FSL_LAYERSCAPE) #include @@ -66,7 +66,7 @@ static inline bool has_erratum_a008378(void) switch (soc) { -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A case SOC_VER_LS1020: case SOC_VER_LS1021: case SOC_VER_LS1022: diff --git a/include/linux/immap_qe.h b/include/linux/immap_qe.h index 6d1f88ec2e..d952efa8f4 100644 --- a/include/linux/immap_qe.h +++ b/include/linux/immap_qe.h @@ -24,7 +24,7 @@ #endif #endif -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index e0dff30f38..bd54089722 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -54,7 +54,7 @@ struct fsl_xhci { struct dwc3 *dwc3_reg; }; -#if defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A) +#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_ARCH_LS1012A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 diff --git a/include/tsec.h b/include/tsec.h index fb27edf225..e99a7fa878 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -20,7 +20,7 @@ #ifndef CONFIG_DM_ETH -#ifdef CONFIG_LS102XA +#ifdef CONFIG_ARCH_LS1021A #define TSEC_SIZE 0x40000 #define TSEC_MDIO_OFFSET 0x40000 #else diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 882aed4a5f..8f3437a208 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -159,7 +159,7 @@ #elif defined(CONFIG_MPC512X) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 -#elif defined(CONFIG_LS102XA) +#elif defined(CONFIG_ARCH_LS1021A) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 #endif -- cgit v1.2.1