From 93fc39a7c3ec5d4ed9f1b75cdbac641c3fe12369 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 19 May 2015 21:44:44 +0200 Subject: sunxi: Remove support for building "old-fashioned" fel binaries The latest versions of the fel tool support loading normal u-boot builds directly, and this is now the preferred way to use the fel boot method. This commit removes support for the old deprecated standalone fel builds. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- include/configs/sunxi-common.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'include/configs') diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index d829899c07..5dd24800b4 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -162,13 +162,6 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE -#ifdef CONFIG_SPL_FEL - -#define CONFIG_SPL_TEXT_BASE 0x2000 -#define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ - -#else /* CONFIG_SPL */ - #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ @@ -186,8 +179,6 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ -#endif /* CONFIG_SPL */ - /* end of 32 KiB in sram */ #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -- cgit v1.2.1 From e049fe282622d78fcc8f2ab9fe00cd186a542fa2 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 19 May 2015 22:12:31 +0200 Subject: sunxi: Update sunxi-common.h to deal with different DRAM base addr on sun9i The DRAM Base differs between sun9i and the others, update sunxi-common.h to deal with this. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- include/configs/sunxi-common.h | 53 ++++++++++++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 18 deletions(-) (limited to 'include/configs') diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5dd24800b4..2b90681a69 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -13,6 +13,8 @@ #ifndef _SUNXI_COMMON_CONFIG_H #define _SUNXI_COMMON_CONFIG_H +#include + #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT /* * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the @@ -39,8 +41,6 @@ #include /* get chip and board defs */ -#define CONFIG_SYS_TEXT_BASE 0x4a000000 - #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL) # define CONFIG_DW_SERIAL #endif @@ -69,8 +69,34 @@ /* CPU */ #define CONFIG_SYS_CACHELINE_SIZE 64 -/* DRAM Base */ +/* + * The DRAM Base differs between some models. We cannot use macros for the + * CONFIG_FOO defines which contain the DRAM base address since they end + * up unexpanded in include/autoconf.mk . + * + * So we have to have this #ifdef #else #endif block for these. + */ +#ifdef CONFIG_MACH_SUN9I +#define SDRAM_OFFSET(x) 0x2##x +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ +#define CONFIG_SYS_TEXT_BASE 0x2a000000 +#define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 +#define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000 +#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 +#else +#define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ +#define CONFIG_SYS_TEXT_BASE 0x4a000000 +#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 +#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 +#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 +#endif + +#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ + #define CONFIG_SYS_INIT_RAM_ADDR 0x0 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ @@ -129,10 +155,8 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ - /* standalone support */ -#define CONFIG_STANDALONE_LOAD_ADDR 0x42000000 +#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR /* baudrate */ #define CONFIG_BAUDRATE 115200 @@ -162,9 +186,6 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE -#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ - #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ @@ -182,8 +203,6 @@ /* end of 32 KiB in sram */ #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ /* I2C */ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER @@ -333,8 +352,6 @@ extern int soft_i2c_gpio_scl; /* Enable pre-console buffer to get complete log on the VGA console */ #define CONFIG_PRE_CONSOLE_BUFFER #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ -/* Use the room between the end of bootm_size and the framebuffer */ -#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 /* * 240M RAM (256M minimum minus space for the framebuffer), @@ -343,11 +360,11 @@ extern int soft_i2c_gpio_scl; */ #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0xf000000\0" \ - "kernel_addr_r=0x42000000\0" \ - "fdt_addr_r=0x43000000\0" \ - "scriptaddr=0x43100000\0" \ - "pxefile_addr_r=0x43200000\0" \ - "ramdisk_addr_r=0x43300000\0" + "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ + "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ + "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ + "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ + "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" #ifdef CONFIG_MMC #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) -- cgit v1.2.1 From 77fe98870bfef558ae12193ffb9d7cfe1736292b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 20 May 2015 15:27:16 +0200 Subject: sunxi: Update sunxi-common.h to deal with different A1-SRAM base addr on sun9i The A1 SRAM Base differs between sun9i and the others, update sunxi-common.h to deal with this, so that we do not set the initial stack pointer to point to the BROM. This avoids the need for the weird undocumented register write I previously took from the allwiner u-boot sources and which needed #ifdef-ery in start.S as it needed to be done really early on. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- include/configs/sunxi-common.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/configs') diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 2b90681a69..76f42f5f3d 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -97,8 +97,20 @@ #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ +#ifdef CONFIG_MACH_SUN9I +/* + * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is + * slightly bigger. Note that it is possible to map the first 32 KiB of the + * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the + * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and + * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. + */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x10000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ +#else #define CONFIG_SYS_INIT_RAM_ADDR 0x0 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ +#endif #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -- cgit v1.2.1 From 1871a8ca62a9f1a3c339b04850a486cf723a4134 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 13 Jan 2015 19:25:06 +0100 Subject: sun9i: Basic sun9i (A80) support Add initial sun9i (A80) support, only uart + mmc are supported for now. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- include/configs/sun9i.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/configs/sun9i.h (limited to 'include/configs') diff --git a/include/configs/sun9i.h b/include/configs/sun9i.h new file mode 100644 index 0000000000..cd9e08d8b1 --- /dev/null +++ b/include/configs/sun9i.h @@ -0,0 +1,21 @@ +/* + * (C) Copyright 2015 Hans de Goede + * + * Configuration settings for the Allwinner A80 (sun9i) CPU + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * A80 specific configuration + */ + +/* + * Include common sunxi configuration where most the settings are + */ +#include + +#endif /* __CONFIG_H */ -- cgit v1.2.1 From f76eba38b3eda905ff3bdc18dd1240d3dcbc6e5a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Kochma=C5=84ski?= Date: Tue, 26 May 2015 17:00:42 +0200 Subject: sunxi/nand: Add support to the SPL for loading u-boot from internal NAND memory This commit adds support to the sunxi SPL to load u-boot from the internal NAND. Note this only adds support to access the boot partitions to load u-boot, full NAND support to load the kernel, etc. from the nand data partition will come later. Signed-off-by: Roy Spliet Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sun4i.h | 1 + include/configs/sun5i.h | 3 +++ include/configs/sun6i.h | 2 ++ include/configs/sun7i.h | 2 ++ include/configs/sun8i.h | 6 ++++++ include/configs/sunxi-common.h | 20 ++++++++++++++++++++ 6 files changed, 34 insertions(+) (limited to 'include/configs') diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index ea079eb5f7..a3c9408518 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -18,6 +18,7 @@ #endif #define CONFIG_SUNXI_USB_PHYS 3 +#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19, 20, 21, 22, 24} /* * Include common sunxi configuration where most the settings are diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h index d257659903..8e13df58bd 100644 --- a/include/configs/sun5i.h +++ b/include/configs/sun5i.h @@ -19,6 +19,9 @@ #define CONFIG_SUNXI_USB_PHYS 2 +/* \todo A13 only defines port 19, whereas A10s requires each of these */ +#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19} + /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 2c24bd2312..e1263f69a5 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -22,6 +22,8 @@ #define CONFIG_SUNXI_USB_PHYS 3 +#define CONFIG_NAND_SUNXI_GPC_PORTS {24, 25, 26} + /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 56101a9ffc..3d26ce8d4a 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -24,6 +24,8 @@ #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_TIMER_CLK_FREQ 24000000 +#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18, 19, 20, 21, 22, 24} + /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index 7111c635c1..cd3375889e 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -20,6 +20,12 @@ #define CONFIG_SUNXI_USB_PHYS 2 +#if defined(CONFIG_MACH_SUN8I_A23) +#define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18} +#elif defined(CONFIG_MACH_SUN8I_A33) +#define CONFIG_NAND_SUNXI_GPC_PORTS {16} +#endif + /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 76f42f5f3d..aad22f7e55 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -148,8 +148,10 @@ #define CONFIG_CMD_MMC #define CONFIG_MMC_SUNXI #define CONFIG_MMC_SUNXI_SLOT 0 +#if !defined(CONFIG_SPL_NAND_SUPPORT) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ +#endif /* CONFIG_SPL_NAND_SUPPORT */ #endif /* 4MB of malloc() pool */ @@ -355,6 +357,24 @@ extern int soft_i2c_gpio_scl; #define CONFIG_ENV_IS_NOWHERE #endif +#ifdef CONFIG_SPL_NAND_SUPPORT +#define CONFIG_NAND +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_NAND_SUNXI +#define CONFIG_CMD_SPL_WRITE_SIZE 0x000400 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000 + +/* \todo Make these parameterisable in kernel config ? */ +#define CONFIG_NAND_SUNXI_PAGE_SIZE 8192 +#define CONFIG_NAND_SUNXI_ECC_STEP 1024 +#define CONFIG_NAND_SUNXI_ECC_STRENGTH 40 +#define CONFIG_NAND_SUNXI_ADDR_CYCLES 5 + +#ifndef CONFIG_NAND_SUNXI_GPC_PORTS +#error "No NAND GPC ports defined, NAND unsupported" +#endif +#endif /* CONFIG_SPL_NAND_SUPPORT */ + #define CONFIG_MISC_INIT_R #define CONFIG_SYS_CONSOLE_IS_IN_ENV -- cgit v1.2.1 From cc08ea4cff827f0929744d8d0134422e01c1f2b5 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Thu, 28 May 2015 21:25:32 +0800 Subject: ARM: sunxi: Enable PSCI for sun6i Now that we have a PSCI backend for sun6i, enable it. Signed-off-by: Chen-Yu Tsai Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sun6i.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/configs') diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index e1263f69a5..a0ebc7e977 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -22,6 +22,11 @@ #define CONFIG_SUNXI_USB_PHYS 3 +#define CONFIG_ARMV7_PSCI 1 +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 +#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE +#define CONFIG_TIMER_CLK_FREQ 24000000 + #define CONFIG_NAND_SUNXI_GPC_PORTS {24, 25, 26} /* -- cgit v1.2.1 From 014414f53695ab3ba5a9d344ad1ba8952bce157c Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Thu, 28 May 2015 21:25:34 +0800 Subject: ARM: sunxi: Enable PSCI for sun8i sun8i uses the same PSCI backend as sun6i, without power clamps. Since there is no secure SRAM, the backend is placed at the end of DRAM. Signed-off-by: Chen-Yu Tsai Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sun8i.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/configs') diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index cd3375889e..fe8c511448 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -20,11 +20,17 @@ #define CONFIG_SUNXI_USB_PHYS 2 +#define CONFIG_ARMV7_PSCI 1 #if defined(CONFIG_MACH_SUN8I_A23) +#define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_NAND_SUNXI_GPC_PORTS {16, 17, 18} #elif defined(CONFIG_MACH_SUN8I_A33) +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_NAND_SUNXI_GPC_PORTS {16} +#else +#error Unsupported sun8i variant #endif +#define CONFIG_TIMER_CLK_FREQ 24000000 /* * Include common sunxi configuration where most the settings are -- cgit v1.2.1