From 3ad63878737a5a2b1e60825bf0a7d601d7a695e7 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 21 Aug 2007 16:27:57 +0200 Subject: ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based) This patch adds support for the matrix keyboard on the lwmon5 board. Since the implementation in the dsPCI is kind of compatible with the "old" lwmon board, most of the code is copied from the lwmon board directory. Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 5ebe4404d9..14a200d3e4 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -34,6 +34,7 @@ #define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ +#define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ #define CONFIG_ADD_RAM_INFO 1 /* Print additional info */ @@ -159,10 +160,16 @@ #define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */ #define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */ +#define CFG_I2C_KEYBD_ADDR 0x56 /* PIC LWE keyboard */ -#define CONFIG_PREBOOT "echo;" \ - "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ - "echo" +#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */ +#if 0 +#define CONFIG_AUTOBOOT_KEYED /* Enable "password" protection */ +#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n" +#define CONFIG_AUTOBOOT_DELAY_STR " " /* "password" */ +#endif + +#define CONFIG_PREBOOT "setenv bootdelay 15" #undef CONFIG_BOOTARGS @@ -210,6 +217,7 @@ #define CONFIG_PHY_ADDR 3 /* PHY address, See schematics */ #define CONFIG_PHY_RESET 1 /* reset phy upon startup */ +#define CONFIG_PHY_RESET_DELAY 300 #define CONFIG_HAS_ETH0 #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ -- cgit v1.2.1 From c64fb30e4c5976007d56fc1789c7a0666082b536 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 22 Aug 2007 08:56:09 +0200 Subject: ppc4xx: Remove unused option CFG_INIT_RAM_OCM Signed-off-by: Stefan Roese --- include/configs/hcu5.h | 1 - include/configs/lwmon5.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h index f95d78ec16..90858819b6 100644 --- a/include/configs/hcu5.h +++ b/include/configs/hcu5.h @@ -73,7 +73,6 @@ * Initial RAM & stack pointer *----------------------------------------------------------------------*/ /* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache */ -#define CFG_INIT_RAM_OCM 1 /* OCM as init ram */ #define CFG_INIT_RAM_ADDR CFG_OCM_BASE /* OCM */ #define CFG_INIT_RAM_END (4 << 10) diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index cf8ff45208..23b19ba89a 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -72,7 +72,6 @@ * Initial RAM & stack pointer *----------------------------------------------------------------------*/ /* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache */ -#define CFG_INIT_RAM_OCM 1 /* OCM as init ram */ #define CFG_INIT_RAM_ADDR CFG_OCM_BASE /* OCM */ #define CFG_OCM_DATA_ADDR CFG_OCM_BASE -- cgit v1.2.1 From c25dd8fc25e9ca3695db996a257d9ba4dab414db Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 23 Aug 2007 11:02:37 +0200 Subject: ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 board This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5 board. Now the "eeprom" command can be used to read/write from/to this device. Additionally a new command was added "eepromwp" to en-/disable the write-protect of this 2nd EEPROM. The 1st EEPROM is not affected by this write-protect command. Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'include/configs') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 23b19ba89a..7b2def3d20 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -161,15 +161,16 @@ *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CFG_I2C_SPEED 100000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F -#define CFG_I2C_MULTI_EEPROMS -#define CFG_I2C_EEPROM_ADDR (0xa8>>1) -#define CFG_I2C_EEPROM_ADDR_LEN 1 +#define CFG_I2C_EEPROM_ADDR 0x53 /* EEPROM AT24C128 */ +#define CFG_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ +#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel AT24C128 has */ + /* 64 byte page write mode using*/ + /* last 6 bits of the address */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ #define CFG_EEPROM_PAGE_WRITE_ENABLE -#define CFG_EEPROM_PAGE_WRITE_BITS 3 -#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */ #define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */ @@ -397,6 +398,8 @@ #define CFG_GPIO_PHY1_RST 12 #define CFG_GPIO_FLASH_WP 14 #define CFG_GPIO_PHY0_RST 22 +#define CFG_GPIO_EEPROM_EXT_WP 55 +#define CFG_GPIO_EEPROM_INT_WP 57 #define CFG_GPIO_WATCHDOG 58 #define CFG_GPIO_LIME_S 59 #define CFG_GPIO_LIME_RST 60 -- cgit v1.2.1 From d7bfa620037a6d2210159387571bdf93aa32c162 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 24 Aug 2007 15:19:10 +0200 Subject: ppc4xx: Change GPIO signal for watchdog triggering on lwmon5 Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 7b2def3d20..ecca577aa4 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -400,9 +400,9 @@ #define CFG_GPIO_PHY0_RST 22 #define CFG_GPIO_EEPROM_EXT_WP 55 #define CFG_GPIO_EEPROM_INT_WP 57 -#define CFG_GPIO_WATCHDOG 58 #define CFG_GPIO_LIME_S 59 #define CFG_GPIO_LIME_RST 60 +#define CFG_GPIO_WATCHDOG 63 /*----------------------------------------------------------------------- * PPC440 GPIO Configuration -- cgit v1.2.1 From 75e1a84d483e36be10e206e539b028c4889e1158 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 24 Aug 2007 15:41:42 +0200 Subject: ppc4xx: Add RTC POST test to lwmon5 board configuration Since this RTC POST test is taking quite a while to complete it's only initiated upon special keypress same as the complete memory POST. Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'include/configs') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index ecca577aa4..be483245b9 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -142,15 +142,16 @@ #endif /* POST support */ -#define CONFIG_POST (CFG_POST_MEMORY | \ - CFG_POST_ECC_ON | \ +#define CONFIG_POST (CFG_POST_CACHE | \ CFG_POST_CPU | \ - CFG_POST_UART | \ - CFG_POST_I2C | \ - CFG_POST_CACHE | \ - CFG_POST_FPU | \ + CFG_POST_ECC_ON | \ CFG_POST_ETHER | \ - CFG_POST_SPR) + CFG_POST_FPU | \ + CFG_POST_I2C | \ + CFG_POST_MEMORY | \ + CFG_POST_RTC | \ + CFG_POST_SPR | \ + CFG_POST_UART) #define CFG_POST_CACHE_ADDR 0x10000000 /* free virtual address */ #define CONFIG_LOGBUFFER -- cgit v1.2.1