From ec48b6c991f400c8583ac2f875d65a8539f0b437 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Aug 2018 14:55:27 +0200 Subject: arm64: versal: Add support for new Xilinx Versal ACAPs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek --- drivers/net/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/net/Kconfig') diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5441da47d1..f1f0e2d94e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -344,7 +344,7 @@ config XILINX_EMACLITE This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config ZYNQ_GEM - depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) + depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) select PHYLIB bool "Xilinx Ethernet GEM" help -- cgit v1.2.1