From ac13eb5de0e465b1bfddab2cdb3a902f583043e8 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Tue, 18 Dec 2012 00:15:45 +0000 Subject: board/T4240qds:Fix TLB and LAW size of NAND flash The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's Address Mask Registers is initialised with the same. So Update TLB and LAW size of NAND flash accordingly. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Andy Fleming --- board/freescale/t4qds/law.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/freescale/t4qds/law.c') diff --git a/board/freescale/t4qds/law.c b/board/freescale/t4qds/law.c index 5debcf612a..6f2c5c86b4 100644 --- a/board/freescale/t4qds/law.c +++ b/board/freescale/t4qds/law.c @@ -40,7 +40,7 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), #endif #ifdef CONFIG_SYS_NAND_BASE_PHYS - SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC), + SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), #endif }; -- cgit v1.2.1