From 67a719da2e5cfdfa461c5a35c1c5a6a2c5e82d73 Mon Sep 17 00:00:00 2001 From: Roy Zang Date: Thu, 3 Feb 2011 22:14:19 -0600 Subject: powerpc/85xx: Add support for Freescale P1023/P1017 Processors Add P1023 (dual core) & P1017 (single core) specific information: * SERDES Table * Added P1023/P1017 to cpu_type_list and SVR list (fixed issue with P1013 not being sorted correctly). * Added P1023/P1027 to config_mpc85xx.h * Added new LAW type introduced on P1023/P1017 * Updated a few immap register/defines unique to P1023/P1017 Signed-off-by: Roy Zang Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/config_mpc85xx.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/powerpc/include/asm/config_mpc85xx.h') diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index b014ec626e..94373011eb 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -121,6 +121,16 @@ #define CONFIG_TSECV2 #define CONFIG_SYS_FSL_SEC_COMPAT 4 +#elif defined(CONFIG_P1017) +#define CONFIG_MAX_CPUS 1 +#define CONFIG_SYS_FSL_NUM_LAWS 12 +#define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_SYS_NUM_FMAN 1 +#define CONFIG_SYS_NUM_FM1_DTSEC 2 +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_SYS_QMAN_NUM_PORTALS 3 +#define CONFIG_SYS_BMAN_NUM_PORTALS 3 + #elif defined(CONFIG_P1020) #define CONFIG_MAX_CPUS 2 #define CONFIG_SYS_FSL_NUM_LAWS 12 @@ -144,6 +154,16 @@ #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_FSL_SATA_ERRATUM_A001 +#elif defined(CONFIG_P1023) +#define CONFIG_MAX_CPUS 2 +#define CONFIG_SYS_FSL_NUM_LAWS 12 +#define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_SYS_NUM_FMAN 1 +#define CONFIG_SYS_NUM_FM1_DTSEC 2 +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_SYS_QMAN_NUM_PORTALS 3 +#define CONFIG_SYS_BMAN_NUM_PORTALS 3 + #elif defined(CONFIG_P2010) #define CONFIG_MAX_CPUS 1 #define CONFIG_SYS_FSL_NUM_LAWS 12 -- cgit v1.2.1