From 627085eacf4a64824fd0bfa2f6f9c1a72d48d21f Mon Sep 17 00:00:00 2001 From: Ovidiu Panait <ovidiu.panait@windriver.com> Date: Thu, 24 Sep 2020 11:54:36 +0300 Subject: microblaze: start.S: Factor out exception setup code to __setup_exceptions Currently, the exceptions setup code is duplicated in pre-relocation and post-relocation init. Factor out this code to __setup_exceptions asm routine to get rid of the duplication. __setup_exceptions is called with a relocation offset parameter (r5) which is set to zero for pre-reloc init and gd->reloc_off for post-reloc exception setup. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/microblaze/cpu/start.S | 197 +++++++++++++++++++++++--------------------- 1 file changed, 103 insertions(+), 94 deletions(-) (limited to 'arch/microblaze') diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index cbec299b7d..b9c6ccc912 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -13,13 +13,6 @@ .text .global _start _start: - /* - * reserve registers: - * r10: Stores little/big endian offset for vectors - * r2: Stores imm opcode - * r3: Stores brai opcode - */ - mts rmsr, r0 /* disable cache */ addi r8, r0, __end @@ -38,6 +31,92 @@ _start: mts rshr, r1 addi r1, r1, -4 /* Decrement SP to top of memory */ + /* Setup vectors with pre-relocation symbols */ + or r5, r0, r0 + bralid r15, __setup_exceptions + nop +#endif /* CONFIG_SPL_BUILD */ + + /* Flush cache before enable cache */ + addik r5, r0, 0 + addik r6, r0, XILINX_DCACHE_BYTE_SIZE + bralid r15, flush_cache + nop + + /* enable instruction and data cache */ + mfs r12, rmsr + ori r12, r12, 0x1a0 + mts rmsr, r12 + + /* TODO: Redo this code to call board_init_f_*() */ +clear_bss: + /* clear BSS segments */ + addi r5, r0, __bss_start + addi r4, r0, __bss_end + cmp r6, r5, r4 + beqi r6, 3f +2: + swi r0, r5, 0 /* write zero to loc */ + addi r5, r5, 4 /* increment to next loc */ + cmp r6, r5, r4 /* check if we have reach the end */ + bnei r6, 2b +3: /* jumping to board_init */ +#ifdef CONFIG_DEBUG_UART + bralid r15, debug_uart_init + nop +#endif +#ifndef CONFIG_SPL_BUILD + or r5, r0, r0 /* flags - empty */ + addi r31, r0, _gd +#if CONFIG_VAL(SYS_MALLOC_F_LEN) + addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET + swi r6, r31, GD_MALLOC_BASE +#endif + brai board_init_f +#else + addi r31, r0, _gd +#if CONFIG_VAL(SYS_MALLOC_F_LEN) + addi r6, r0, CONFIG_SPL_STACK_ADDR + swi r6, r31, GD_MALLOC_BASE +#endif + brai board_init_r +#endif +1: bri 1b + + .section .bss +.align 4 +_gd: + .space GENERATED_GBL_DATA_SIZE + +#ifndef CONFIG_SPL_BUILD + .text + .ent __setup_exceptions + .align 2 +/* + * Set up reset, interrupt, user exception and hardware exception vectors. + * + * Parameters: + * r5 - relocation offset (zero when setting up vectors before + * relocation, and gd->reloc_off when setting up vectors after + * relocation) + * - the relocation offset is added to the _exception_handler, + * _interrupt_handler and _hw_exception_handler symbols to reflect the + * post-relocation memory addresses + * + * Reserve registers: + * r10: Stores little/big endian offset for vectors + * r2: Stores imm opcode + * r3: Stores brai opcode + */ +__setup_exceptions: + addik r1, r1, -28 + swi r2, r1, 4 + swi r3, r1, 8 + swi r6, r1, 12 + swi r7, r1, 16 + swi r8, r1, 20 + swi r10, r1, 24 + /* Find-out if u-boot is running on BIG/LITTLE endian platform * There are some steps which is necessary to keep in mind: * 1. Setup offset value to r6 @@ -76,7 +155,7 @@ _start: swi r2, r0, 0x8 /* user vector exception - imm opcode */ swi r3, r0, 0xC /* user vector exception - brai opcode */ - addik r6, r0, _exception_handler + addik r6, r5, _exception_handler sw r6, r1, r0 /* * BIG ENDIAN memory map for user exception @@ -109,7 +188,7 @@ _start: swi r2, r0, 0x10 /* interrupt - imm opcode */ swi r3, r0, 0x14 /* interrupt - brai opcode */ - addik r6, r0, _interrupt_handler + addik r6, r5, _interrupt_handler sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x12 @@ -121,67 +200,26 @@ _start: swi r2, r0, 0x20 /* hardware exception - imm opcode */ swi r3, r0, 0x24 /* hardware exception - brai opcode */ - addik r6, r0, _hw_exception_handler + addik r6, r5, _hw_exception_handler sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x22 sh r7, r0, r8 rsubi r8, r10, 0x26 sh r6, r0, r8 -#endif /* CONFIG_SPL_BUILD */ - - /* Flush cache before enable cache */ - addik r5, r0, 0 - addik r6, r0, XILINX_DCACHE_BYTE_SIZE - bralid r15, flush_cache - nop - - /* enable instruction and data cache */ - mfs r12, rmsr - ori r12, r12, 0x1a0 - mts rmsr, r12 - /* TODO: Redo this code to call board_init_f_*() */ -clear_bss: - /* clear BSS segments */ - addi r5, r0, __bss_start - addi r4, r0, __bss_end - cmp r6, r5, r4 - beqi r6, 3f -2: - swi r0, r5, 0 /* write zero to loc */ - addi r5, r5, 4 /* increment to next loc */ - cmp r6, r5, r4 /* check if we have reach the end */ - bnei r6, 2b -3: /* jumping to board_init */ -#ifdef CONFIG_DEBUG_UART - bralid r15, debug_uart_init - nop -#endif -#ifndef CONFIG_SPL_BUILD - or r5, r0, r0 /* flags - empty */ - addi r31, r0, _gd -#if CONFIG_VAL(SYS_MALLOC_F_LEN) - addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET - swi r6, r31, GD_MALLOC_BASE -#endif - brai board_init_f -#else - addi r31, r0, _gd -#if CONFIG_VAL(SYS_MALLOC_F_LEN) - addi r6, r0, CONFIG_SPL_STACK_ADDR - swi r6, r31, GD_MALLOC_BASE -#endif - brai board_init_r -#endif -1: bri 1b + lwi r10, r1, 24 + lwi r8, r1, 20 + lwi r7, r1, 16 + lwi r6, r1, 12 + lwi r3, r1, 8 + lwi r2, r1, 4 + addik r1, r1, 28 - .section .bss -.align 4 -_gd: - .space GENERATED_GBL_DATA_SIZE + rtsd r15, 8 + or r0, r0, r0 + .end __setup_exceptions -#ifndef CONFIG_SPL_BUILD /* * Read 16bit little endian */ @@ -249,39 +287,10 @@ relocate_code: addi r24, r0, CONFIG_SYS_TEXT_BASE /* Get reloc offset */ rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */ - addik r6, r0, 0x2 /* BIG/LITTLE endian offset */ - lwi r7, r0, 0x28 - swi r6, r0, 0x28 /* used first unused MB vector */ - lbui r10, r0, 0x28 /* used first unused MB vector */ - swi r7, r0, 0x28 - -#ifdef CONFIG_SYS_USR_EXCEP - addik r6, r0, _exception_handler - addk r6, r6, r23 /* add offset */ - sw r6, r1, r0 - lhu r7, r1, r10 - rsubi r8, r10, 0xa - sh r7, r0, r8 - rsubi r8, r10, 0xe - sh r6, r0, r8 -#endif - addik r6, r0, _hw_exception_handler - addk r6, r6, r23 /* add offset */ - sw r6, r1, r0 - lhu r7, r1, r10 - rsubi r8, r10, 0x22 - sh r7, r0, r8 - rsubi r8, r10, 0x26 - sh r6, r0, r8 - - addik r6, r0, _interrupt_handler - addk r6, r6, r23 /* add offset */ - sw r6, r1, r0 - lhu r7, r1, r10 - rsubi r8, r10, 0x12 - sh r7, r0, r8 - rsubi r8, r10, 0x16 - sh r6, r0, r8 + /* Setup vectors with post-relocation symbols */ + add r5, r0, r23 /* load gd->reloc_off to r5 */ + bralid r15, __setup_exceptions + nop /* Check if GOT exist */ addik r21, r23, _got_start -- cgit v1.2.1 From f5d8b1a1f9f08911636dc095c7f4f281a0dfc59d Mon Sep 17 00:00:00 2001 From: Ovidiu Panait <ovidiu.panait@windriver.com> Date: Thu, 24 Sep 2020 11:54:37 +0300 Subject: microblaze: start.S: Use board_init_f_alloc/init in early init Implement early init by calling generic board_init_f_alloc_reserve and board_init_f_init_reserve functions: * drop SYS_MALLOC_F_LEN related code, as allocation and gd->malloc_base assignment are taken care of by the generic functions * drop _gd logic Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/start.S | 46 ++++++++++++++++++++++----------------------- 1 file changed, 22 insertions(+), 24 deletions(-) (limited to 'arch/microblaze') diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index b9c6ccc912..9479737aa2 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -17,25 +17,39 @@ _start: addi r8, r0, __end mts rslr, r8 - /* TODO: Redo this code to call board_init_f_*() */ + #if defined(CONFIG_SPL_BUILD) addi r1, r0, CONFIG_SPL_STACK_ADDR - mts rshr, r1 - addi r1, r1, -4 /* Decrement SP to top of memory */ -#else -#if CONFIG_VAL(SYS_MALLOC_F_LEN) - addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN) #else addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET #endif - mts rshr, r1 + addi r1, r1, -4 /* Decrement SP to top of memory */ + /* Call board_init_f_alloc_reserve with the current stack pointer as + * parameter. */ + add r5, r0, r1 + bralid r15, board_init_f_alloc_reserve + nop + + /* board_init_f_alloc_reserve returns a pointer to the allocated area + * in r3. Set the new stack pointer below this area. */ + add r1, r0, r3 + mts rshr, r1 + addi r1, r1, -4 + + /* Call board_init_f_init_reserve with the address returned by + * board_init_f_alloc_reserve as parameter. */ + add r5, r0, r3 + bralid r15, board_init_f_init_reserve + nop + +#if !defined(CONFIG_SPL_BUILD) /* Setup vectors with pre-relocation symbols */ or r5, r0, r0 bralid r15, __setup_exceptions nop -#endif /* CONFIG_SPL_BUILD */ +#endif /* Flush cache before enable cache */ addik r5, r0, 0 @@ -48,7 +62,6 @@ _start: ori r12, r12, 0x1a0 mts rmsr, r12 - /* TODO: Redo this code to call board_init_f_*() */ clear_bss: /* clear BSS segments */ addi r5, r0, __bss_start @@ -67,27 +80,12 @@ clear_bss: #endif #ifndef CONFIG_SPL_BUILD or r5, r0, r0 /* flags - empty */ - addi r31, r0, _gd -#if CONFIG_VAL(SYS_MALLOC_F_LEN) - addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET - swi r6, r31, GD_MALLOC_BASE -#endif brai board_init_f #else - addi r31, r0, _gd -#if CONFIG_VAL(SYS_MALLOC_F_LEN) - addi r6, r0, CONFIG_SPL_STACK_ADDR - swi r6, r31, GD_MALLOC_BASE -#endif brai board_init_r #endif 1: bri 1b - .section .bss -.align 4 -_gd: - .space GENERATED_GBL_DATA_SIZE - #ifndef CONFIG_SPL_BUILD .text .ent __setup_exceptions -- cgit v1.2.1 From 78efd7847c0ec037a168b8a03b28f949ad4bfffe Mon Sep 17 00:00:00 2001 From: T Karthik Reddy <t.karthik.reddy@xilinx.com> Date: Thu, 17 Sep 2020 06:52:09 -0600 Subject: microblaze: Enable spi for microblaze Enable SPI drivers and driver model for microblaze. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/microblaze/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/microblaze') diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index ff6b3c7e3d..2755cce884 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -16,6 +16,9 @@ config TARGET_MICROBLAZE_GENERIC select OF_CONTROL select SUPPORT_SPL select SYSRESET + select DM_SPI + select DM_SPI_FLASH + select SPI imply CMD_DM endchoice -- cgit v1.2.1 From 92dc9210635a73ed80d7aa77932f64a8af516a68 Mon Sep 17 00:00:00 2001 From: Michal Simek <michal.simek@xilinx.com> Date: Thu, 22 Oct 2020 11:08:58 +0200 Subject: xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/microblaze/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/microblaze') diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 2755cce884..99a17bccb3 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -23,6 +23,7 @@ config TARGET_MICROBLAZE_GENERIC endchoice +source "board/xilinx/Kconfig" source "board/xilinx/microblaze-generic/Kconfig" endmenu -- cgit v1.2.1