From 59d0612252a0ffcb878a1891249d32a306a24fa6 Mon Sep 17 00:00:00 2001 From: Richard Retanubun Date: Thu, 24 Mar 2011 08:58:11 +0000 Subject: ColdFire: Queued SPI driver This patch adds a driver for Freescale Colfire Queued SPI bus. Coded to work with 8 bits per transfer to use with SPI flash. CPOL, CPHA, and CS_ACTIVE_HIGH can be configured. Tested with MCF5270 which have 4 chip selects. Activate by #define CONFIG_CF_QSPI in board config. Signed-off-by: Richard Retanubun --- arch/m68k/include/asm/coldfire/qspi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/m68k/include/asm/coldfire') diff --git a/arch/m68k/include/asm/coldfire/qspi.h b/arch/m68k/include/asm/coldfire/qspi.h index 8bcd2e4db1..9fd98f6c04 100644 --- a/arch/m68k/include/asm/coldfire/qspi.h +++ b/arch/m68k/include/asm/coldfire/qspi.h @@ -98,7 +98,7 @@ typedef struct qspi_ctrl { #define QSPI_QAR_RECV (0x0010) #define QSPI_QAR_CMD (0x0020) -/* DR */ +/* DR with RAM command word definitions */ #define QSPI_QDR_CONT (0x8000) #define QSPI_QDR_BITSE (0x4000) #define QSPI_QDR_DT (0x2000) -- cgit v1.2.1